RSA

RSA Encryption IP

RSA is a public key cryptography standard that is widely used in smartcards, certificate authority servers, gateways and handheld devices.

esi-crypto

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INTRODUCTION

RSA is an algorithm for public key cryptography that is based on the difficulty of factoring large integers. It was first publicly described in 1978. A user of RSA creates and publishes the product of two large prime numbers and a public key. The prime factors are kept secret. Anyone can use the public key to encrypt a message, but only someone knowing the prime factors can decrypt the message.

Public key accelerators are deployed in semiconductors used for Internet Protocol Security (IPsec), Secure Sockets Layer (SSL) and Transport Layer Security (TLS) protocol implementations.

TARGET APPLICATIONS

  • PKCS#1 RSA Cryptography Standard
  • PKCS#3 Diffe-Hellman Key Agreement Standard
  • PKCS#5 Password-Based Cryptography Standard
  • ANSI X9.31
  • IEEE 1363
  • IPsec
  • SSL
  • TLS

SOLUTIONS

EnSilica can provide RSA related IP for use in ASIC or FPGA target technologies. The standard RSA module is available as an eSi-RISC APB peripheral, where it seamlessly integrates with EnSilica’s cryptography library.

The peripheral can be configured for between 512 and 4096-bit maximum key size to keep the resource requirements as low as possible. It accelerates the most time consuming part of the RSA algorithm, notably the modular exponentiation required for both encryption and decryption using public and private keys. For a typical 1024-bit keysize the modular exponentiation can be performed 25 times faster than a pure software implementation. A 1024-bit message can be encrypted (public key of 65537) in 50,000 clock cycles and decrypted in 3,600,000 clock cycles. The peripheral can also be used with software support for CRT based decryption and for generating keys.

The core is very small; when targeting TSMC90LP at 200MHz it comprises only 17k gates for the logic and an equivalent 32k gates including all memories.

KEY FEATURES

  • Configurable for maximum key size
  • Small – only 17k gates + memory
  • 25x faster than software based algorithms
  • Configurable digit size – 32, 31 or 28-bits to suit available software libraries
  • Fully integrated with EnSilica’s cryptographic software library