eSi-Comms – Parameterisable Communications IP
To support communications based ASIC designs we have built an enviable OFDM IP portfolio under the eSi-Comms brand, which is instrumental in providing a platform for custom and standards based designs. This IP is highly parameterised and suitable for many of the current air interface standards like WLAN, WiMax, DVB and DAB.
Features
- Parameterisable and configurable to serve a wide diversity of modern air interface standards.
- Simple streaming interfaces supporting dataflow.
- Register interface for configuration.
- Synchronization in time, frequency and phase through advanced DSP algorithms and control loops.
- Maximum likelihood equalization of single and multicarrier systems.
- Demodulation for BPSK up to 1024-QAM with soft decision bit-metric generation.
- Reed-Solomon and soft-decision Viterbi error correction decoding.
- Multiple antenna receiver processing.
- Standards include 802.11a/n, DVB-T(2), DVB-S(2), DVB-C(2), DAB, WiMax, UWB, LTE.
- Applications include wireless sensors, remote metering, cellular, wireless LAN and broadcast products.
Benefits
- Advanced DSP algorithms for robust communication links.
- Integrated by our expert team.
- Backed up by the EnSilica reputation for quality design services.
Optimised IP
The eSi-Comms IP is available through our Design Services to speed up your time to market and reduce risk. We can provide you with C, SystemC or MATLAB libraries of the IP blocks for your evaluation and integration into your system design tool-chain. Once the final transceiver design is agreed EnSilica will parameterise and configure the IP, delivering your custom variation optimised for power and area. Optionally we can take ownership of the whole ASIC
or FPGA development.
System Level Design
We provide a consultancy service for custom transceiver designs, where the synchronization, equalization and channel coding are simulated to find the effects of analogue impairments, noise and channel effects, such as multipath and correlation. Our experts can advise on the right signal processing to deal with these impairments, and design the hardware to suit.
Integration with eSi-RISC
The trend for communications is ever more towards a flexible software modem. To support this approach many of the eSi-Comms IP blocks are designed to act as hardware accelerators to EnSilica's eSi-RISC configurable processor. This provides a unique combination of flexibility together with dedicated hardware engines to off-load compute intensive processing.
Transmit IP
Each standard has its own particular variation of the actual processing chain, however they share a common baseline. The diagram below shows the elements of a generic OFDM transmit chain. This identifies the typical processing modules that are found in many popular transmit chains such as IEEE802.11a, DVB, DAB, WiMax. EnSilica has generic solutions for the baseband modules identified in blue, and for some specific standards like IEEE802.11a/n these are already pre-configured.
Receive IP
EnSilica provides a portfolio of generic OFDM receiver IP blocks. These allow many of the popular communications standards to be built. The IP catalogue is summarised in the diagram below which shows a typical OFDM receiver chain. The exact signal processing line-up may not be exactly as described in this diagram, it is just for illustration.

Many of the receiver modules provide advanced features suited to OFDM processing, such as the FFT which has run-time variable transform size, forward/inverse transform, block floating point and frequency domain order processing. Similarly the QAM processor can demodulate a different constellation size per clock cycle to allow for adaptive bit loading on OFDM subcarriers. Where the processing is specific to an air-interface standard then some custom logic/code may be required
to complete the signal processing chain. A typical example of this is the channel estimation which is
often best supported on a microprocessor.
Support
The entry level for a wireless communication system has high technical barriers. Increasingly the system needs to be designed around readily available
IP components, utilising proven DSP algorithms
for synchronization, equalization, demodulation
and channel decoding. The rationale for using
eSi-Comms IP is to speed up development time
and reduce risk in final silicon.