eSi-RISC – Configurable Embedded Processor IP
eSi-RISC is a highly configurable microprocessor architecture for embedded systems, that scales across a wide range of applications. The core has been silicon proven in a number of ASIC and FPGA technologies.
- Highly configurable, allowing the processor to be tailored to fit a wide range of applications, on both FPGA and ASIC technology.
- Performance and code density amongst the very
- Silicon proven.
- License-free SW development using GNU tools.
- Competitive licensing terms.
- Backed up by the EnSilica reputation for quality
EnSilica have defined a family of processor cores that demonstrates the versatility of the eSi-RISC configurable architecture to cover a wide range of applications.
EnSilica's eSi-1600 16-bit CPU core is a low-cost,
low-power processor. It offers similar performance
to more expensive 32-bit CPUs while having a system
cost comparable to that of 8-bit CPUs.
EnSilica's eSi-3200 32-bit CPU core is particularly suited
to embedded control applications.
EnSilica's eSi-3250 32-bit CPU core is a high-performance processor ideal for integration into ASIC and/or FPGA designs with off-chip memories. The eSi-3250 is suited
to a wide range of applications including running complex operating systems such Linux and uClinux.
A hardware development kit is available for evaluating these cores. This board provides a range of memory
and external interfaces to suit most applications.
The toolchain is based upon the industry standard GNU toolchain, which includes an optimising C and C++ compiler, assembler, linker, debugger, simulator and binary utilities. All these tools can be driven by the customisable Eclipse IDE (Integrated Development Environment).
The toolchain is available for both Windows and Linux
hosts and is available to use at no additional cost.
The eSi-RISC is implemented as a soft IP core, based on synthesisable Verilog RTL and can be easily ported to a wide range of ASIC processes and FPGAs. The design is DFT ready, supporting full scan insertion for all flip flops and memory BIST.
A selection of AMBA peripherals are supplied with the core, including: UART, SPI, I2C™, Timer, PWM, Watchdog, GPIO, PS/2, Ethernet MAC as well as a static memory interface and DMA engine. By using an industry standard bus, a wide range of 3rd party IP cores can also be used.
By utilising EnSilica's system level design expertise to define the most appropriate configuration for your particular application and then using our design services to integrate the eSi-RISC core within your particular design, you can achieve a truly optimised solution without any of the pain often associated
with embedded processor designs.