date-04mar-w75

EnSilica article in Mentor Graphic’s ‘Verification Horizons’, March 2016

Reusable Verification Framework

Verification HorizonsIn the latest edition, EnSilica’s verification consultant, Gunther Clasen describes a reusable verification framework that allows interface connections to be written only once and used in both block and system-level testbenches.

The full article can be read here

 

About Verifications Horizons

The Verification Horizons publication expands upon verification topics to provide concepts, values, methodologies and examples to assist with the understanding of what these advanced functional verification technologies can do and how to most effectively apply them.

 

date-19feb-w75

Meet EnSilica at Embedded World 2016, Nuremberg 23-25th Feb 2016

Come and meet EnSilica at Embedded World 2016 , Hall 4, Stand No. 4-546

Embedded World 2016EnSilica will be demonstrating their eSi IoT SoC development board based around the Altera MAX10 FPGA and the eSi-RISC low-power processor IP. It provides a highly flexible IoT development platform which can be cost optimized and integrated into a System in Package (SiP) or System on Chip (SoC).

iot-demo-board-fullThe IoT board includes the following features:

  • Altera MAX10 FPGA
  • Bluetooth Smart and NFC connectivity
  • GPS with built in antenna
  • 9-axis motion, temperature, humidity , light sensors
  • Buzzer and digital microphone
  • Capacitive touch button

The company will also be demonstrating its portfolio of IP solutions, including eSi-RISC, a highly configurable 16/32 bit embedded processor, alongside IP for communications, processor peripherals and encryption.

EnSilica founded in 2001 has a strong track record of success in delivering ASIC and FPGA based solution to semiconductor companies and OEMs worldwide. The company is headquartered in the UK and has offices in India and the USA.  Specialist in low-power ASIC design and complex FPGA-based embedded systems. EnSilica provide full turnkey ASIC development and supply of mixed signal and digital ASIC from 180nm to 28nm for mobile, IoT, smart sensing and industrial applications.

About Embedded World 2016

From 23 – 25 February 2016 at the Nuremberg Exhibition Centre the focus will be again on all things embedded systems: the embedded community comes together here in annual rotation at the embedded world Exhibition & Conference. As a leading international world fair with the focus exclusively on embedded technologies, it reflects the trends in the sector; around 900 exhibitors are presenting state-of-the-art covering all aspects of embedded systems.

date-09feb-w75

EnSilica Launch New eSi IoT Board at IoT Expo

iot-expo-2016At the forthcoming Internet of Things (IoT) Tech Expo at London’s Olympia on the 10-11th February Ensilica will be demonstrating the new eSi IoT Board, a highly integrated, low-cost hardware platform for developing IoT solutions. The board will be in action on Ensilica’s booth #109. Single board prices start at £149.

iot-demo-board-fullBased around the Altera MAX10 FPGA and the NIOS or eSi-RISC SoC’s the board provides a highly flexible IoT development and delivery solution.

  • Altera MAX10 FPGA
  • NIOS or eSi-RISC SoC
  • Bluetooth Smart
  • GPS with built in antenna
  • 9-axis motion sensor
  • Temperature sensor
  • Humidity sensor
  • NFC with built in antenna
  • Light sensor
  • Buzzer
  • Digital microphone
  • Capacitive touch button
  • 5 LEDs
  • Powered from micro-USB

The company will also be demonstrating its portfolio of IP solutions, including eSi-RISC, a highly configurable 16/32 bit embedded processor, alongside IP for communications, processor peripherals and encryption.

EnSilica also provides services to companies with in-house ASIC and FPGA design teams. These services include system engineering, analog and mixed signal design, advanced verification using UVM, DFT and physical implementation.

EnSilica has a strong track record of success in delivering semiconductor IP and providing ASIC and FPGA design services to semiconductor companies and OEMs worldwide. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems, including hardware and embedded software development.

About IoT Tech Expo
This year’s Expo will highlight the most innovative advancements in technologies which are affecting IoT and brings together key industries from across Europe for two days of top level content and discussion. Industries include Manufacturing, Transport, Health, Logistics, Government, Energy and Automotive. http://www.iottechexpo.com/europe/

date-02dec-w75

EnSilica and Express Logic Bring ThreadX RTOS to eSi-RISC Processor Cores

The combination of eSi-RISC and ThreadX is ideally suited to IoT applications

threadxWokingham (UK) & SAN DIEGO — 2nd December 2015.  EnSilica, a leading independent provider of semiconductor IP and IC design services, and Express Logic, the worldwide leader in royalty-free real-time operating systems (RTOSes), have collaborated to port Express Logic’s popular ThreadX® real-time operating system (RTOS) to EnSilica’s eSi-RISC family of silicon-proven, highly configurable embedded processor cores.

ThreadX ease-of-use is facilitated by its intuitive, highly functional API and advanced, instant-on RTOS features. ThreadX features efficient real-time responsiveness and code compactness that appeal to developers of the most demanding, deeply embedded consumer and industrial electronics. Together eSi-RISC and ThreadX share small footprint, high-performance, and low-power characteristics that, when combined with ThreadX’s pre-certification for many safety standards, ideally suit them to IoT and industrial applications. With billions of units already deployed, ThreadX delivers rock-solid reliability coupled with exceptional quality. Express Logic’s companion X-Ware software features ThreadX fully integrated with Express Logic’s FileX high-performance MS-DOS compatible file system, NetX high-performance implementation of TCP/IP protocol standards, and USBX high-performance USB host, device, and On-The-Go (OTG) embedded stack.

EnSilica’s eSi-RISC is a family of highly configurable and low-power soft processor cores for embedded systems that scale across a wide range of applications and uniquely support both 16-bit and 32-bit configurations. The cores have been extensively silicon proven in a variety of ASIC technologies down to 28nm. The eSi-RISC family includes the eSi-1600 16-bit processor, eSi-3200 32-bit processor, eSI-3250 32-bit processor, eSi-3250sfp incorporating a single precision floating point processor, eSi-3260 32 bit processor with SIMD DSP extensions and eSI-32X0MP 32-bit scalable, asymmetric multicore processor. The processor cores also benefit from a configurable memory architecture and configurable cache options.

“Today’s embedded developers are challenged to provide solutions that process high volumes of complex data using minimal processor cycles and memory,” said William Lamie, President of Express Logic. “We believe EnSilica’s flexible eSi-RISC processor cores and our highly efficient ThreadX RTOS creates a commercial-grade solution capable of addressing the most demanding projects now and into the future.”

“While some eSi-RISC customers often choose an open-source RTOS to realise up-front budget savings, others believe that a commercially supported RTOS is more preferable for successful embedded product development and fast time-to-market delivery,” said Ian Lankshear, CEO of EnSilica. “Our collaboration with Express Logic in developing the ThreadX port provides our customers with access to one to one of the most successful and popular commercial RTOSes on the market. The combination of ThreadX and eSi-RISC delivers unrivalled compactness, high performance and low-power for all manner of embedded applications.”

# # #

About EnSilica

EnSilica was founded in 2001 and has a strong track record of success in delivering semiconductor IP and providing ASIC/FPGA design services to semiconductor companies and OEMs worldwide. The company is headquartered in the UK and has offices in India and the USA. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems including hardware and embedded software development. In addition to providing IP and turnkey ASIC/FPGA development, EnSilica also provides point services to companies with in-house ASIC design teams. These services include system engineering, analog and mixed signal design, and advanced verification using UVM, DFT and physical implementation. For further information about EnSilica, visit http://www.ensilica.com.

About Express Logic

Headquartered in San Diego, CA, Express Logic offers the most advanced run-time solution for deeply embedded applications, including the popular ThreadX® RTOS, the high-performance NetX™ TCP/IP stack, the FileX® embedded FAT-compatible file system, the USBX™ Host/Device USB protocol stack, and the GUIX™ graphical user interface development toolkit. Most products from Express Logic include full source code and all have no run-time royalties. For more information about Express Logic solutions, please visit the Web site at www.expresslogic.com, call 1-858-613-6640, or e-mail inquiries to info@expresslogic.com.

All trademarks are recognised and are the property of their respective companies.

Media contacts:

  • Dr. David Wheeler, Technical Director for EnSilica
    Tel: +44 (0)1183 217 332. Email: david.wheeler@ensilica.com
  • Keith Mason, Humbug PR
    Tel: +44 (0)1305 849403. Email: keith.mason@humbugpr.com
date-29oct-w75

EnSilica Opens Bristol-based Analog and Mixed-Signal IC Design Centre

ensilica-bristolWokingham (UK) — 29th October 2015. EnSilica, a leading independent provider of semiconductor IP and IC design services, has added a regional office and design centre in Bristol to its headquarters in Wokingham and design centre in Bangalore.

“The Bristol office will provide more localised support capabilities for the company’s customers in Bristol and the South West as well as providing a dedicated design centre that will act as a centre of excellence for our analog and mixed-signal IC design services,” said Ian Lankshear, CEO of EnSilica.

EnSilica’s director of analog and mixed-signal design Nick Weiner will head up the Bristol design centre. Nick founded Phyworks (sold to Maxim in 2010) and Xintronix (sold to FTDI in 2013), and joined EnSilica earlier this year.

“Nick has specialist knowledge in products developed for the fibre-optic communications industry, including FTTH transceivers, 10Gbit/s transceivers and signal integrity ICs. His experience will be invaluable in helping our client deliver their projects on-spec, on-time and on-budget.” said Ian Lankshear, CEO of EnSilica.

* Photo: Members of the Bristol design team, including 5th from left CEO Ian Lankshear, 6th from left, director of analog and mixed-signal design Nick Weiner.

# # #

About EnSilica

EnSilica was founded in 2001 and has a strong track record of success in delivering semiconductor IP and providing ASIC/FPGA design services to semiconductor companies and OEMs worldwide. The company is headquartered in the UK and has offices in India and the USA. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems including hardware and embedded software development. In addition to providing IP and turnkey ASIC/FPGA development, EnSilica also provides point services to companies with in-house ASIC design teams. These services include system engineering, analog and mixed signal design, and advanced verification using UVM, DFT and physical implementation. For further information about EnSilica, visit http://www.ensilica.com.

All trademarks are recognised and are the property of their respective companies.

Media contacts:

  • Nick Weiner, Analog and Mixed-signal Director for EnSilica
    Tel: +44 (0) 117 214 0254. Email: nick.weiner@ensilica.com
date-03jul-w75

EnSilica announce new sales partnership with Beyond Electronics, Israel

EnSilica have announced a new sales partnership with Beyond Electronics in Israel to  to help grow its customer footprint within the region.Beyond_electronics

Beyond will be offering the full range of EnSilica IPs to customers within Israel including eSi-RISC (16/32 bit embedded processor) , eSi-Crypto, eSi-Comms and eSi-Connect IPs. Beyond will also help EnSilica to expand its design service activities within the country.

“EnSilica has been highly successful in selling its IP across a number of countries over the past few years and by partnering with Beyond Electronics we are looking to replicate that same success within the Israeli market.  Beyond Electronics work with many of the most exciting and innovative companies within the country and we look forward to helping those customers achieve even more success through the adoption of EnSilica IP and services” said Ian Lankshear, Managing Director of EnSilica.

Yossi Benizri, CEO of Beyond Electronics said  “EnSilica is an ambitious company, and a leader in the Processor IP Market  and we are extremely pleased they have chosen to partner with us to create a stronger presence in Israel”

About Beyond Electronics :

Beyond Electronics is a Technical sales representative company serving the semiconductor market in Israel and Europe. Our line card consists of a focused group of industry-leading suppliers supporting the  semiconductor market.

Founded in 2012, Beyond Electronics has been rapidly expanding and already recognized as a core partner by most of the OEM’s, IDMs & fabless firms in the region.

Beyond have deployed a team of strong technical sales and application professionals who possess the requisite skills and background to forge long-term partnerships between customers and suppliers.

For further information, visit http://www.beyond-electronics.com/

About EnSilica: 

EnSilica was founded in 2001 and has a strong track record of success in delivering semiconductor IP and providing ASIC and FPGA design services to semiconductor companies and OEMs worldwide. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems, including hardware and embedded software development.

Our portfolio of IP includes eSi-RISC, a highly configurable 16/32 bit embedded processor, and families of IP covering communications, processor peripherals and encryption. In addition to providing IP and turnkey ASIC and FPGA development, EnSilica also provides point services to companies with in-house ASIC and FPGA design teams. These services include system engineering, analog and mixed signal design, advanced verification using UVM, DFT and physical implementation.

The company is headquartered in the UK and has offices in India and the USA.

For further information about EnSilica, visit http://www.ensilica.com

 

date-04jun-w75

EnSilica Launches eSi-32X0MP Scalable, Asymmetric Multicore Processor

eSi-32X0MP targets low-power WiFi, LTE Cat-0 and other IoT wireless standards as well as intelligent sensor applications requiring high performance and low power in a small footprint

Wokingham, UK – 4th June 2015. EnSilica, a leading independent provider of semiconductor IP and services, has added to its family of eSi-RISC processor cores with the launch of the eSI-32X0MP scalable, asymmetric multicore processor.

esi-32xomp-w200bThe eSi-32X0MP targets applications requiring a high level of processing per MHz and low power consumption in a small footprint, such as low-power WiFi, LTE Cat-0 and other IoT standards as well as scalable sensor (touch screens and intelligent sensors), Gbit security protocol and solid state disk levelling algorithm processing.

A typical configuration of the eSi-32X0MP to address wireless/cellular standards comprises an asymmetric dual core processor. One processor is optimized for implementing physical layer (PHY) processing and the second core is optimized for running an advanced protocol stack. However, the eSi-32X0MP can be configured with an unlimited number of processors depending on the application. Indeed, an early implementation already in production is a seven core eSi-3250MP for multi-gigabit packet processor acceleration.

The eSi-32X0MP’s PHY core provides advanced DSP acceleration with dual-MAC and SIMD instructions for complex arithmetic as well as fast divide, square root and log calculation acceleration. The second core’s advanced protocol stack accelerates various bit field operations, such as fast insertion and extraction, and a cyclic redundancy checker (CRC). The processor sub-systems can be enhanced for symbol level processing including FFT/IFFT, DFT, Viterbi and Turbo decoding using optional hardware accelerators from EnSilica’s eSi-Comms IP library. Security layers can be implemented with the aid of a memory protection unit (MPU), True random number generator (TRNG) and optional hardware accelerators for Snow3G, AES, RSA and ECC from EnSilica’s eSi-Crypto IP library.

For advanced power saving, the eSi-32X0MP implements both clock and power gating. Power gating is supported through a UPF-based (Universal Power Format) design compatible with standard front and back-end EDA tool flows. Load-locked and store-conditional instructions are provided to support inter-core communications. Both the processor and tool chain fully support multicore debug.

Each core can deliver up to 3.72 CoreMark per MHz and, when speed optimized in TSMC’s 28nm HPC process, can be clocked at over 1GHz with a dynamic power of only 14.4µW/MHz per core. When optimized for power the dynamic power for each core is only 5.09µW/MHz.

“The eSi-32X0MP is ideal for implementing low-power WiFi and wireless/cellular IoT standards such as LTE Cat-0,” said Ian Lankshear, CEO of EnSilica “The multicore architecture delivers exceptional processing performance at mature geometries. For example, an 180nm dual core configuration can deliver 500 MIPS for a gate count of less than 50k NAND equivalent gates.”

“Adopting the highly compact eSi-32X0MP asymmetric dual processor architecture for our touch screen controllers has facilitated the development of a novel high-performance IC solution for high-end applications without having to move to a more advanced process geometry,” said Ken Tsui, Vice President, Design Engineering of Solomon Systech Limited.

“The eSi-32X0MP provides us with an optimized platform to address IoT wireless standards with two highly coupled cores, each accelerated for the task in hand but still benefiting from a shared development tool chain,” said Dr Sondur Lakshmipathi CEO of Mymo Wireless. “Additionally, EnSilica’s eSi-Comms IP suite is fully integrated providing acceleration for symbol level processing operations.”

# # #

About EnSilica
EnSilica was founded in 2001 and has a strong track record of success in delivering semiconductor IP and providing ASIC/FPGA design services to semiconductor companies and OEMs worldwide. The company is headquartered in the UK and has offices in India and the USA. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems including hardware and embedded software development. In addition to providing IP and turnkey ASIC/FPGA development, EnSilica also provides point services to companies with in-house ASIC design teams. These services include system engineering, analog and mixed signal design, and advanced verification using UVM, DFT and physical implementation. For further information about EnSilica, visit http://www.ensilica.com.

All trademarks are recognised and are the property of their respective companies.

Media contacts:

Dr. David Wheeler, Technical Director for EnSilica
Tel: +44 (0)1183 217 332. Email: david.wheeler@ensilica.com

Keith Mason, Humbug PR
Tel: +44 (0)1305 849403. Email: keith.mason@humbugpr.com

Ref: ENS024
Words: 517

This press release and any associated images (in high-resolution compressed jpeg format) can be downloaded from www.humbugpr.com.

date-14apr-w75

EnSilica Releases eSi-3260 Processor Core

EnSilica launches eSi-3260 processor core with comprehensive SIMD DSP extensions targeting IoT sensing nodes and always-on applications

Combines advanced DSP features with eSi-RISC’s characteristic low power and
small silicon footprint

ENS023-esi-3260-press-image-wb-medium-bWokingham, UK – 14th April 2015. EnSilica, a leading independent provider of semiconductor IP and services, has added to its family of eSi-RISC processor cores with the launch of the eSi-3260 targeted at IoT sensing nodes and always-on applications. The eSi-3260 combines advanced DSP functionality with the characteristic eSi-RISC small footprint and extremely low power consumption.

The inclusion of a 64-bit precision, fully-pipelined MAC unit makes the eSi-3260 ideal for audio, high accuracy sensor hub, motion control and touch screen applications. In addition to 32-bit data, the MAC unit supports dual 16-bit SIMD (single instruction multiple data) multiply and MAC operations. Uniquely, full complex multiplication is also supported, performing four multiplies and two additions per cycle. The inclusion of saturating and rounding arithmetic, along with instructions to support bit-reversed addressing, provides
excellent FFT acceleration and accuracy.

The eSi-3260 employs a 5-stage pipeline which has been optimized to deliver market-leading performance in mainstream process nodes with frequencies of over 1GHz obtainable in a 28nm process with dynamic power as low as 14μW/MHz. This can be reduced to 3μW/MHz when optimizing the processor for power, rather than frequency. A flexible memory architecture, with either native, AXI or AHB interfaces, allows the inclusion of instruction and data caches as well as tightly coupled memories for running code that is timing critical. The addition of a cache facilitates high-performance operations even when they are run from embedded Flash.

The radix-8 fast divide and square root options enable 32-bit integer division and square root operations to be reduced to six cycles, greatly decreasing the cycle count in sensing operations where these operations are key to the code operation. An optional, fully pipelined single precision floating point capability helps accelerate high dynamic range calculations for applications such as gesture recognition and fingerprint detection. Custom instruction support allows a further level of application acceleration such as IIR and logarithmic DSP operations or cryptographic operations for standards including ECC, RSA, AES and SHA.

“The balance of processing performance, silicon area, low power and DSP functionality provided by the eSi-3260 delivers a distinct technology edge for customers looking to develop complex IoT sensing nodes and devices in what is a highly competitive market,” said Ian Lankshear, CEO of EnSilica.

Adopting the eSi-RISC series of processors for its touch screen controllers, Ken Tsui, Vice President, Design Engineering of Solomon Systech Limited said: “The solution developed by EnSilica, with its excellent features, has enhanced greatly the functionality of our product. We look forward to joining hands again with the team to develop more high-performance IC solutions.”

About EnSilica
EnSilica was founded in 2001 and has a strong track record of success in delivering semiconductor IP and providing ASIC/FPGA design services to semiconductor companies and OEMs worldwide. The company is headquartered in the UK and has offices in India and the USA. The company is a specialist in low-power ASIC design and complex FPGA-based embedded systems including hardware and embedded software development. In addition to providing IP and turnkey ASIC/FPGA development, EnSilica also provides point services to companies with in-house ASIC design teams. These services include system engineering, analog and mixed signal design, and advanced verification using UVM, DFT and physical implementation. For further information about EnSilica, visit http://www.ensilica.com.

About Solomon Systech
Founded in 1999, Solomon Systech Limited is a leading semiconductor company providing display IC products and system solutions on an international basis under its own global brand. Adopting a “fabless” business model, the Group specializes in the design, development and sales of proprietary IC products and system solutions that enable a wide range of display applications for smartphones, smart TVs and other smart devices including consumer electronics products, portable devices, industrial appliances and green energy applications. Solomon Systech (International) Limited’s shares have been listed on the main board of the Stock Exchange of Hong Kong Limited since April 8th, 2004 (stock code: 2878). More information about the Group, its products and services may be obtained at http://www.solomon-systech.com

All trademarks are recognised and are the property of their respective companies.
This press release and any associated images (in high-resolution compressed jpeg format) can be downloaded from www.humbugpr.com.

Media contacts:

Dr. David Wheeler, Technical Director for EnSilica
Tel: +44 (0)1183 217 332. Email: david.wheeler@ensilica.com

Keith Mason, Humbug PR
Tel: +44 (0)1305 849403. Email: keith.mason@humbugpr.com
Ann Williams, Humbug PR
Tel: +44 (0)1305 849402. Email: ann.williams@humbugpr.com

Ref: ENS023

date-10jan-w75

eASIC and EnSilica Announce 16-bit and 32-bit Soft Processors for eASIC Nextreme

easic_150_48Santa Clara, CA – January 10, 2014 – eASIC® Corporation, a leading provider of Single Mask Adaptable ASIC™ and EnSilica, a leading independent provider of IC design services and IP today announced the immediate availability of 16-bit (eSi-1600) and 32-bit (eSi-3200) soft processor cores. The eSi-1600 and the eSi-3200 are based on an EnSilica’s eSi-RISC highly versatile microprocessor architecture that can be optimized by application through extensive configuration options and custom instructions.

The eSi-RISC architecture provides the flexibility to define a range of hardware functions that minimize silicon area. On–chip memory requirements are reduced by inter-mixed 16-bit and 32-bit instructions, resulting in high code density without compromising performance. eSi-RISC utilizes the industry standard GNU optimizing C/C++ compiler and Eclipse IDE for rapid software development, and supports efficient debugging through a JTAG interface and hardware breakpoints. The eSi-RISC architecture also supports instruction and data cache options for both the 16 and 32-bit processor and a MMU, Floating Point Unit and DSP extensions.

“EnSilica are delighted to partner with eASIC and make our IP available through eASIC’s eZ-IP Alliance Program” said Philip Faulkner, Director of Projects at EnSilica. “The combination of our low cost, flexible, high performance processors and the fast design and turnaround time of eASIC’s single mask ASIC devices enables customers to overcome the challenge of software versus hardware partitioning across a wide range of applications. We look forward to continuing to expand the portfolio of IP available under the program,” added Faulkner.

“The eSi-RISC processors make an ideal embedded solution for use on our single mask adaptable ASIC devices,” said Jasbinder Bhoot, vice president, worldwide marketing at eASIC Corporation. “The small footprint coupled with the versatile configurations options provides a highly cost optimized and low power solution.

About eASIC

eASIC is a fabless semiconductor company offering breakthrough Single Mask Adaptable ASIC devices aimed at dramatically reducing the overall cost and time-to-production of customized semiconductor devices. Low-cost, high-performance and fast-turn ASIC and System-on-Chip designs are enabled through patented technology utilizing Via-layer customizable routing. This innovative fabric allows eASIC to offer a new generation of ASICs with significantly lower up-front costs than traditional ASICs.
Privately held eASIC Corporation is headquartered in Santa Clara, California. Investors include Khosla Ventures, Kleiner Perkins Caufield and Byers (KPCB), Crescendo Ventures, Seagate Technology (NASDAQ:STX) and Evergreen Partners. For more information on eASIC please visit www.easic.com.