systems design Making the right architecture decisions and system trade-offs is vital to the competitiveness of your product. With strong domain-level expertise in video and wired and wireless access, we have the skills to model and architect complex systems and their environments, providing a design solution to meet your products' commercial and technical requirements

design capture Good quality HDL code ensures good quality of results from synthesis and facilitates efficient reuse. EnSilica has extensive experience in creating a broad range of components using VHDL and Verilog. Skilled in IP integration and design for re-use methodology, our highly productive design team has proven ability in taking designs from specification through to fully verified RTL.  implementation Efficient implementation means reduced cost and/or high performance. Our team is experienced in producing efficient implementation of designs in ASIC or FPGA technologies using industry leading synthesis and static timing analysis (STA) tools to solve timing closure issues.  functional verification Design complexities are increasing and functional verification dominates the product development cycle. Fully conversant with the latest verification methodologies, our verification team can develop a project-specific verification plan to meet your time-to-market and coverage goals, using an appropriate methodology. EnSilica is skilled with the following verification techniques:- HDL Based Complex VHDL and Verilog test-benches Synthesisable test benches for emulation Protocol checkers and modelling C/C++ Based Bit-accurate modelling Cycle accurate C models PLI/FLI Advanced Verification Transaction Level Modelling Functional coverage collection and analysis Others FPGA platform based Emulator based Perl, TCL, shell scripting

design for test EnSilica is skilled in producing comprehensive manufacturing test suites for complex SoC devices. These skills include:- full scan implementation design rule checking and fixing ATPG at speed testing test coverage analysis memory BIST IEEE 1149.1 (JTAG)  tools and methodology EnSilica has a wealth of experience with industry standard EDA tools from all the leading vendors including Mentor Graphics, Magma, Synopsys, Cadence, Synplicity and TransEDA. This allows us to implement / optimise tool usage and recommend efficient EDA flows to our customers as part of our services.