Energy harvesting authentication ASIC

A biometric sensor company required an ASIC to perform processor intensive authentication powered from a contactless card reader. The goal was to develop the ASIC to co-package with a biometric sensor. The processing platform needed to run power efficiently using the energy available from the contactless field and to perform a complex authentication algorithm in a fraction of a second.

Customer Challenge

Customer Challange

The field energy provided by NFC card readers is designed to be sufficient to power small micro controllers ("Secure Elements” which would normally be equivalent to Arm Cortex M3) running simple routines. The challenge was to efficiently harvest energy from an NFC field to power a sophisticated and power-hungry vector DSP processor running a complex algorithm, to be completed in a fraction of a second. For most efficient NFC field energy harvesting, the energy receiving circuits must operate at voltages higher than those usually used by NFC tag electronics. The challenge becomes one of efficient energy harvesting whilst protecting the energy harvesting circuits from over-voltage damage.

Solution

Solution

The approach to efficient energy harvesting, whilst protecting the energy harvesting circuits from over-voltage damage, is to use highvoltage transistors and shunt regulation followed by efficient switch mode voltage conversion. The switch mode power supply provides a sufficient maximum current at the core voltage used by the digital circuits providing complex authentication algorithm. As even the smallest inductor components have profiles too high for use on bank card electronics, implementation of the switch mode power supply used an inductor printed on the circuit board substrate. EnSilica modelled different SMPS architectures, selecting a Hysteretic Mode Control architecture to deliver the required efficiency using the circuit board inductor. A Tensilica® ConnX vector DSP was found to deliver the maximum processing efficiency when using custom instruction to accelerate the algorithm. Strong energy efficient encryption was also required for authentication and to secure the connection, EnSilica eSiCrypto library of cryptography hardware accelerators were used. The power available for an NFC field depends upon the reader and upon the distance between the reader and the card. To manage the resulting large variation in power available for processing, the systems uses on-chip storage capacitors and power management functions to slow down processing or stop processing to match the energy available.

Highlights

A Cadence Tensilica® ConnX BBE32EP vector DSP processor core with on-chip eFlash memory multiple SRAM instances each with power mode controls
Enilica’s ECDSA, AES and SHA hardware accelerators for the encryption function
Delivery of full set of software drivers for the ASIC
Delivery of an FPGA prototyping platform allowing the customer to develop their application software whilst the ASIC development was in progress

Components - EnSilica IP

EnSilica custom hysteretic Mode Control SMPS
EnSilcia LDO, Bandgaps and brownout detectors
EnSilica on-chip oscillators
EnSilica eSi-Crypto AES, ECDSA, SHA and TRNG

Components - 3rd Party IP

Cadence Tensilica® ConnX BBE32EP
Low power retentions memories
Low-power standard cell libraries
eFlash Memory Macro

Application Area

Wearables
Mobile
Security

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