
ASIL-D automotive Chassis controller ASIC
EnSilica was approached by a Tier 1 manufacturer who was responding to the OEMs RFQ. We considered the requirements and proposed a design approach. Our case for the approach was that it allowed for rapid completion of the design and that the resulting ASIC would be highly reliable as necessary to comply with the challenging AEC-Q100 Grade 1 quality and reliability requirements. Together with the Tier 1 manufacturer, we presented the proposed approach, with simulation results, to the major OEM. The Tier 1 manufacturer and EnSilica were awarded the business. At that moment, the ASIC development timeline was even more challenging, there was only 2 years until the OEM's start of production.
Customer Challenge
Customer Challenge
A new Electronic Control Unit (ECU) to implement advanced chassis control in a forthcoming range of vehicles, for which the Start of Production (SoP) was planned within less than 2.5 years later. The ECU was to include multiple independent H-Bridge controllers having programmable control bandwidths, programmable PWM frequencies and support for a number of special-purpose control algorithms. The implementation was to be software-free. Automotive Tier 1 manufacturers responding to the RFQ would require a new ASIC to meet the demanding performance requirements, small footprint and features to support ISO26262 ASIL-D compliance. Further, the new ASIC would have to be designed, evaluated, qualified to automotive standards, test program and Production Part Approval Process (PPAP) completed, and be ready for production within eighteen months.
Solution
Solution
We started the development by working with our customer, and directly with the end customer (OEM), to complete a detailed ASIC specification. We also developed a simulation model of a complete system (ASIC and load) to enable us to investigate performance for ranges of parameter values and to verify that the solution would be sufficiently robust. The architecture and safety measures, agreed with the Tier 1 and OEM, were designed to meet the ASIL-D requirements and included many safety features such as redundant circuits and detectors for specific fault conditions. The device was implemented in a mature automotive grade BCD technology for which there are reliable simulation models. The device was designed and taped-out in a full production wafer masks. First samples were on the OEM's validation bench in 11.5 months after the start of the development. The devices performed as specified. Automotive qualification and system testing proceeded. These steps and a full PPAP were complete allowing for the start of ASIC production well ahead of the start of production of the new vehicles.
Highlights
Custom designs analogue include ADC, sense amplifier and gate drivers
EnSilica design fully programmable digital control loop
SPI interface with error correction and detection
3rd Party IP
OTP memory macro
Standard cell, characterized by EnSilica for extended temperature range
Application Area
Automotive
Functional Safety
Quality
Design to meet ISO26262 ASIL-D
Full AC-Q100 Grade 1 qualification

