Distributed Beamformer for Satellite User Terminals(EN92040)
The goals of the EN92040 IC are to addresses
the rapidly developing mobile broadband
satellite communications market, by
facilitating low-cost hybrid beamforming for
satellite-on-the-move (SOTM) user terminals
and fixed installations communicating with
LEO constellations.
Customer Challenge
Customer Challange
ere are multiple deployments of LEO
satellite constellations in progress for both
broadband communication and narrow band IoT applications. These constellations
need cost-effective terminals. To date, most
solutions are analogue (with limited features)
or digital (with high cost and power), whereas
EnSilica’s approach uses an Arm Cortex-M4 to
dynamically control a hybrid analogue/digital
solution. The EnSilica hybrid solution uses only
a fraction more power than an analogue
solution, while bringing many of the benefits
of a digital solution.
An important challenge in the development
of electronically steerable antenna arrays is
maintaining near perfect timing
synchronization across the array. This is
particularly true for broadband mmWave,
where only ps-scale clock skews can be
tolerated before performance degrades to
unacceptable levels
Solution
Solution
The Cortex-M4 MCU with floating point unit is
a key functional component in EN92040 that
provides multiple functions in a cost effective way
Functions
Dynamic recomputation of digital and analogue beam-steering coefficients
Calibration control of the local array
Control of EN92040 DSP units, DACs/ADCs, RF PLLs and other peripherals and interfaces
Control of connected RF ICs via SPI
Respond to commands from a central host
Device security
Other Custom Functions
Digital beamforming, including True Time Delay (TTD) to allow for accurate beam pointing and side lobe control
Up/down sampling and NCOs to allow flexibility with RF IC compatibility
Perform crest factor reduction (CFR),digital pre-distortion (DPD) and linear equalizers algorithms used to maximize PA efficiency and spectral purity
Custom-designed high-speed on-chip DACs and ADCs to support wide bandwidth connections
Custom designed low-jitter RF PLL generating LO signals for Ku and Ka band RF ICs reducing the BOM cost
Synchronizing controller, synchronizing events on the same clock cycle across the array
Data RAMs for supporting test and calibration functions to improve system performance
Application Area
Automotive
5G
Infrastructure
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