Electronically steered antennas are now a core building block for satellite user terminals, especially in low Earth orbit (LEO) constellations and 5G Non‑Terrestrial Network (NTN) deployments. If you are developing user equipment for satellite communications, terminals must maintain links to fast‑moving satellites, cope with platform motion and interference, and still hit tight power and cost targets. This makes the beamforming silicon architecture a critical design choice. EnSilica’s experience in custom beamforming ASICs for satellite user terminals and wider communications systems directly targets these design constraints.
Why hybrid beamforming silicon matters
A purely analogue array keeps RF hardware compact and power efficient, with phase shifters and gain control close to each antenna element and signals combined in RF. That approach can work for relatively narrowband, slowly changing links, but it struggles once bandwidths grow and interference becomes significant, because beam squint, limited calibration options and weak visibility into the received wavefield start to dominate.
A fully digital array takes the opposite route by digitising every element, enabling multi‑beam operation, adaptive nulling and sophisticated spatial algorithms. The downside is the number of high‑speed converters, clocks and digital channels required at Ku/Ka‑band, which can make power, thermal design and integration impractical for mass‑market terminals.
Hybrid beamforming ASICs provide a pragmatic middle ground. You retain a short, efficient analogue beamforming path at sub‑array level, while moving higher‑level beam shaping and interference mitigation into a smaller set of digital channels. This reduces converter count and power compared with a fully digital array, yet offers far more beam control and observability than a simple analogue design.
Partitioning the phased array
In a hybrid architecture, the aperture is divided into tiles. Each tile typically contains a cluster of radiating elements, one or more analogue beamformer ICs and a digital beamformer device.
- The analogue beamformer ASIC handles per‑element phase and amplitude and combines elements into sub‑arrays.
- The digital beamformer ASIC operates on the digitised outputs of those sub‑arrays rather than on individual elements.
The number of elements feeding each digital channel – the hybrid ratio – is a key design lever. Low ratios provide finer spatial resolution and more powerful interference mitigation; higher ratios cut converter count, data rate and power. For mass‑market user terminals, practical ratios usually sit between a few elements per converter and a few dozen elements per converter, depending on link budget, interference environment and cost targets.
This tiling approach simplifies manufacturability. RF routing remains local and predictable within a panel, and tiles can be replicated to scale array size without redesigning RF distribution each time. In practice, that lets you scale a terminal family by re‑using the same beamforming silicon and tile design across multiple apertures.
Hybrid beamforming architecture for scalable LEO and 5G NTN user terminals: Combining efficient analogue beamforming with advanced digital beamforming, local frequency synthesis and integrated calibration, hybrid phased-array ASICs enable high-performance satellite user terminals with scalable apertures, robust beam tracking and effective interference mitigation.
Local frequency generation and array coherence
For wideband OFDM waveforms in 5G NTN and high‑order modulation at Ka‑band, array‑level phase noise and coherence matter as much as individual PLL datasheet numbers. If phase errors drift across the aperture, coherent gain is lost, beam pointing degrades and nulls become shallow, while EVM and spectral regrowth worsen.
Hybrid beamforming silicon addresses this by generating high‑frequency local oscillators locally in each tile or sub‑array. Instead of distributing a Ka‑band local oscillator (LO) across the entire panel, a lower‑frequency reference is distributed and multiplied on‑tile with integrated PLLs. This keeps LO traces shorter and less exposed to parasitics and temperature gradients.
Because the phase‑noise contributions of multiple local PLLs are largely uncorrelated, their outputs average down when combined coherently across the array. Simulations in the source work show that by distributing synthesis across multiple low‑power PLLs, it is possible to meet demanding broadcast‑grade phase‑noise limits at array level while cutting PLL power by around 80% compared with a single high‑performance COTS device. If you are architecting the silicon, this favours integrated PLLs per tile or per sub‑array, robust reference distribution and facilities to monitor and trim local oscillators in the field.
Role of the digital beamformer
On the receive path, each sub‑array output appears as a virtual element to the digital beamformer. The number of digital channels is much smaller than the number of physical elements, but still sufficient to retain useful spatial information. With K digital channels, the system can typically separate the desired signal from up to about K–1 significant interferers in realistic user terminal scenarios.
On this reduced‑dimension data, the digital processing chain can perform:
- Initial direction finding and beam acquisition.
- Fine beam tracking under platform and satellite motion, often combining direction‑of‑arrival estimates with simple error‑sensing schemes.
- Detection and localisation of interference sources, followed by adaptive beamforming to place nulls where they provide the most benefit.
In many designs, classical direction‑of‑arrival algorithms are simplified and constrained using prior knowledge of satellite geometry to keep processing and memory demands under control. Increasingly, deterministic algorithms are combined with lightweight ML‑based estimators to stabilise performance at low SNR or under imperfect calibration, without adding RF complexity. For your SoC or ASIC, that points towards programmable beamforming engines, flexible coefficient storage and interfaces that allow higher‑level software to steer algorithms and update weights independently of the RF front‑end.
Calibration as a built-in system function
In highly integrated phased arrays, gain, phase and timing errors vary with temperature, operating state and ageing, so calibration cannot be treated as a one‑time production step. It has to be implemented as a repeatable system function that runs throughout the terminal’s lifetime.
Hybrid architectures make this more tractable. Keeping RF paths local within tiles reduces variation and drift compared with long, distributed analogue networks, improving inherent stability. At the same time, digital channels at sub‑array level provide enough observability to estimate and correct relative errors without digitising every element.
In practice, calibration flows combine on‑chip test modes with over‑the‑air procedures that use known signals from the network to keep the array aligned over time. Supervisory algorithms, including ML‑based approaches, can learn slow drift behaviour and update correction tables in the background, reducing recalibration frequency and helping maintain performance over temperature and ageing. Beamforming ASICs therefore benefit from embedded calibration engines, access to key internal nodes and stable reference‑distribution schemes.
Implications for LEO and 5G NTN terminals
LEO constellations and 5G NTN specifications share several traits: rapid motion, wideband OFDM waveforms, frequent beam updates and crowded spectrum. These conditions make it difficult for a purely analogue array to maintain performance and push fully digital arrays beyond realistic power and cost limits for user equipment.
Hybrid phased‑array beamforming ASICs offer an architecture that aligns well with this environment. Local analogue beamforming keeps the RF front‑end compact and efficient, while digital control across sub‑arrays provides sufficient beam agility and spatial awareness for link acquisition, tracking and interference mitigation. Local frequency generation helps maintain array coherence without extreme PLL power budgets, and tile‑level calibration keeps performance stable over time and temperature.
For teams designing next‑generation satellite user terminals, this hybrid ASIC approach provides a practical way to meet LEO and 5G NTN requirements without resorting to either oversimplified analogue technology or impractical, fully digital architectures. EnSilica’s application‑specific products for satcom user terminals apply these hybrid phased‑array concepts in silicon, covering both Ka‑ and Ku‑band beamforming devices. Where standard beamforming ICs are not an exact fit, EnSilica’s turnkey ASIC services enable OEMs to implement hybrid beamforming architectures as fully custom devices, while managing design, verification and supply chain as a single programme.
