Testimonials

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Alcatel-Lucent

Alcatel Lucent

EnSilica have supported Alcatel-Lucent in the development of a Remote Radio Head FPGA.

EnSilica were responsible for the design and verification of a number of modules within the RRH processing chain along with the integration and verification of the top level design prior to timing closure & fitting in the chosen FPGA device. The project also included the integration of CPRI IP from the FPGA vendor into the design.

The project was divided into a number of phases, ending with the delivery of a timing closed/functionally verified drop into the wider Alcatel-Lucent organisation for HW integration and SW testing. On-time delivery was a paramount requirement to ensure the testing team were kept fully utilised and the delivery commitments to the end customer were met.EnSilica succeeded in meeting all delivery dates for the project.

EnSilica adopted a rigorous verification methodology – developing an extensive set of self-checking testcases verifying each module as well as chip level simulation. This was significantly different from previous FPGA designs where HW testing was started after minimal simulation. This approach resulted in significantly faster device validation – with each drop showing a high degree of functionality from first switch-on. The availability of comprehensive test-cases ensured that any HW issues could be quickly investigated and resolved.

This was the best HW bring-up we have ever experienced. The quality of deliverables from EnSilica provided high confidence that the demanding timescales for the project could be achieved.

A key benefit for Alcatel-Lucent was the ability of EnSilica to re-size the team based upon the scope of the work needed for a particular phase. The EnSilica team ranged from 2 engineers up to a maximum of 7 during the peak phases of the project. Being able to work on multiple drops in parallel significantly reduced the overall project timescales. Most of the support was undertaken at EnSilica’s dedicated design centre in Wokingham, along with on-site support as required. The availability of project management support from EnSilica ensured that Alcatel-Lucent were always fully informed of the status of work being undertaken, schedule and issues requiring attention.

EnSilica have shown themselves to be a flexible and highly skilled design services partner and certainly someone we would use again on future projects.

Mark Britton
Technical Manager for Digital Hardware
Alcatel-Lucent

Altera

Altera

EnSilica, a leading provider of IC design services and system solutions have recently completed a major project with a Tier1 mobile communications company, to deliver a world-class Remote Radio Head (RRH) solution based on the Altera’s High End Stratix FPGA technology.

EnSilica were responsible for design and verification tasks within the RRH processing chain along with the integration and verification of the top level design, followed by timing closure & fitting. Altera also provided CPRI IP, customised for the specific application and extensive use was made of the Altera DSP Builder tools to generate timing-optimised register transfer level (RTL) code.

The project was divided into a number of phases, ending with the delivery of a timing closed/functionally verified production device ready for HW integration and SW testing. On-time delivery was a paramount requirement to ensure the testing team were kept fully utilised and the delivery commitments to the end customer were met.

EnSilica succeeded in meeting all delivery dates for the project.

This was a great example of how the combination of EnSilica’s high quality design services offering and Altera technology and IP can deliver the best possible solution for our customers. For some customers adopting leading-edge FPGA technologies can be daunting, but with EnSilica engaged, customers can be totally confident that the development is in safe hands and they will have a production ready device in the shortest possible time. This is good for the customer and good for Altera.

EnSilica are a member of the Altera Design Services network, bringing together companies with the experience and expertise to enable Altera’s customers achieve their challenging product development needs – lowering risk and accelerating time to market.

Mark Packmann
Major Account Manager, Altera

Michael Sharpless
Worldwide Partner Program Manager, Altera

Delta Microelectronics

logo_deltaDELTA’s design team developed a low-power ASIC for a wireless tag application using the EnSilica eSi-3200 32-bit processor IP core. The integration process was very smooth, with an excellent set of deliverables, documentation and examples. We had the processor core integrated with our own peripheral IP very quickly. The tools and debug facilities were very professional including support for both Linux and Windows, there were some excellent features to support hardware and software co-simulation which reduce the overall verification cycle.

“DELTA and our end customer are very pleased with the quality of the IP and the overall power saving it delivered over using other cores, we will certainly use it on other projects requiring a low-power, silicon efficient MCU.”

Per Ølund
Executive Vice President
Detla Microelectronics

Dialog Semiconductor

Dialog Semiconductor

“Dialog Semiconductor has used EnSilica to provide additional design and verification expertise on numerous projects connected with the development of high volume ICs.

EnSilica have applied a range of advanced techniques to address the verification challenges of these devices and support the successful delivery of high quality silicon. Throughout the projects, EnSilica have demonstrated commitment to the projects providing a mix of on-site / off-site support and the ability to adjust the size of the team based upon the demands of the projects – to allow projects to continue in parallel or provide additional resource at key phases of the projects to ensure that tapeout dates are achieved.

The use of a trusted and highly skilled design services partner to support our internal development team, provides several benefits for Dialog Semiconductor and has been a contributory factor in the delivery of successful designs to our customers.”

Stuart Levine
Director of Engineering – Digital Systems

Dongbu Hitek

Dongbu Hitek

At the start of our new project, there were several candidate CPUs for this product. After an extensive technical and commercial evaluation Dongbu HiTek selected the EnSilica eSi-1600 processor IP and peripherals set for our project.

While evaluating their IP, EnSilica’s team responded fast and professionally and had all the relevant experiences to support our project. Even though there is no local office in Korea, they supported in real time.

They understood our project requirements and we found the IP had very competitive performance. During developing our project, EnSilica team proposed some custom instruction specific to our application that saved important memory and power.

Their quality IP and support made our project on-time and a success. Through silicon verification, there was no CPU issue found and we were very pleased with the result.

We have decided to use EnSilica’s IP for our next project and we are confident that EnSilica will again provide the best service and support to make this another success project.

Haejin Song
Dongbu HiTek

enModus

enModus

EnSilica provided RTL-to-GDSII and DFT services to support the development of our first Smart Building technology ASIC development.  The work was carried out professionally with clear reporting throughout the project, and all deliverables were of high quality.

EnSilica’s team also responded very quickly to some late RTL changes by pulling out all the stops and working at the weekend to re-generate the GDSII in time for our tape-out date.

The teams response and professionalism was impressive. Thanks from all of us at enModus.

Andy Heaton
Founder and CEO

Imagination Technologies

Imagination Technologies Limited

“EnSilica engineers have provided a wide range of design service on a number of chip development projects for us and undertook key roles in the development of two complex SoC products. Imagination Technologies has been very pleased with the results produced by the EnSilica design team and we will continue to use them on future projects.”

Martin Ashton
VP Engineering, POWERVR Visual IP

Kili Corporation

Kili Corp

My team has been working with EnSilica and the eSi-RISC processor for a number of years over a number of IC developments, and the level of service and quality of the IP they provide is excellent. During the processor evaluation, EnSilica’s level of support was excellent. We were able to demonstrate that the configurability and custom instructions provided us with real technical differentiation compared to other CPU cores.

As part of the license agreement, EnSilica also provided a design services package to deliver a complete multi-processor AMBA sub-systems including cache memory, USB and all the key peripherals required for our application. This included external APB buses to allow us to connect our own IPs. The delivery came complete with software API and examples allowing us to quickly implement our own application code on an FPGA platform in parallel with the chip development.

During the process we requested a number of changes to the system which were turned around very quickly and efficiently. Outsourcing the processor sub-system to EnSilica helped reduce our IC development time and allowed us to focus on our end application specific IPs and differentiation. The flexible multi-processor architecture has helped us developed novel security features to meet FIPS security certification.

We plan to continue to use eSi-RISC IP in future products and will use their services to support our ongoing chip development activities.

Kili Corporation, Toronto, Canada
Afshin Rezayee
Founder and Co-President

Moortec

Moortec

Moortec outsourced RTL to GDSII implementation work of a number of critical digital control blocks on a large mixed-signal ASIC to EnSilica.

The work was completed successfully and smoothly. The two teams worked very closely and well together. The Moortec design team greatly appreciated the professionalism and support of the EnSilica PnR team and project management support and we look forward to working together again in the near future.

Martin Collinge
Project Manager
Moortec Semiconductor
July 2013

Motorola

Motorola

“Having had a number of bids, we turned to EnSilica to provide a cycle-accurate C model of a major signal processing subsystem, a project for which timescale was critical.

EnSilica responded rapidly with a strong, well presented commercial and technical proposal, and were very easy to work with. Their work was first class, including comprehensive reporting and very professional deliverables. The project was completed to budget and on schedule. We would gladly work with them again.”

Michael Barkway

Navtech

Navtech

“Navtech’s objective was to develop a new version of a radar system to reduce size, lower cost, and improve reliability by integrating as much functionality as possible into a single device. A standard single-chip solution was not available and Navtech engaged EnSilica as a design partner to produce a custom design. EnSilica performed a study of the project requirements and advised Navtech that implementation in a single Altera Stratix II FPGA device was possible. Approximately 80% of the design was delivered by EnSilica and the project was completed on time and within budget. The result was a cost saving over the previous solution with significant size reduction and improvement in reliability. We highly recommend EnSilica and will be using them on future projects.”

Phil Avery
Managing Director

Nujira

Nujira

After being recommended to us by another mixed signal IC company we engaged EnSilica to perform the layout of the digital block in our RF IC.

EnSilica’s execution of the project was faultless, they provided my team and I clear feedback on issues with the RTL and timing constraints as well recommending the fixes to make the design run through cleanly. They were very responsive and turned round the design promptly, the database was well structured and had all the reports and scripts we needed to maintain the design.

EnSilica understood the issues of working on digital blocks of mixed signal IC and were easy to work with both on a technical and commercial level. The project went very smoothly and we intend to engage them again for our next project.

Clem Robertson
Project Manager

NXP Semiconductor

NXP Semiconductor

“EnSilica supported the verification and debug of the PNX8543 design. All members of their team were highly experienced, worked efficiently and contributed to the overall quality of the verification of this complex SoC. We intend to use their services again in the future.”

Iqbal Sharif
GM SoC Design Centre

Posedge

Posedge

To support our innovative wired packet processor sub-system IP, Posedge required multiple instantiations of an embedded processor with 3 different configurations. Due to the number of cores in the system the key selection criteria was a low gate-count and good code density as well as the requirement to support multi-core debug.

Of three processors evaluated, only the eSi-3250 exhibited the combination of functionality and flexible licensing that we needed to take our product development plans forward. EnSilica even created a special version of the eSi-3250, with the option to switch the caching capability on and off, giving us extra flexibility.

The eSi-3250 is also backed by a professional toolchain capable of supporting multi-core debug and validation. We used both the Windows and Linux version that are both easy to use and very stable. Posedge are now standardising on the eSi-3250 for all our wired/wireless networking IP solutions.

EnSilica have provided excellent support to our USA and Indian based teams through the complete design cycle as well as during silicon bring-up.

Chakra Parvathaneni
Vice-President of Marketing
Posedge Inc

Semisens

testimonial-semisens-logo

Semisens could reduce die size and lower power consumption of our touch screen controllers using EnSilica’s IPs. Those devices are now successfully released to the market. Benchmarking performed by one of end customers showed that Semisens touch controller consumes lowest power among touch controllers available in the market. In addition to the value the CPU core, EnSilica’s IP provides ease of integration and verification with other logic blocks. Quick application support of quality apps engineers also made our IC design engineers feel comfortable to work with EnSilica. With all those benefits brought to our chip design, EnSilica is now selected as the sole CPU vendor for Semisens. We are glad that the right partnership made our device achieve the best performance and the highest value in this competitive market.

Dave Lee
SoC Design Manager
May 2014

Senscient

Senscient

“EnSilica was recommended by electronics supplier EBV as a local and experienced FPGA design services company with an excellent reputation. We also tendered the work to other suppliers for comparison. We were impressed with the budgetary quote and the team’s overall competence. After completing work on the transmit FPGA signal processing to budget and on time, we engaged EnSilica for the receiver design. This enabled us to replace an Analog Devices floating point DSP, SSRAM and SDRAM with a single low-cost Cyclone III FPGA, leading to a significant cost saving.

The deliverables from EnSilica have always been of the highest quality and the project management has been highly effective. We would recommend EnSilica without hesitation, and look forward to working with them again in the future.”

Lee Richman
CEO

Solantro

Solantro

After an extensive search, we found EnSilica’s eSi1600/3200 to be an excellent match for our controller IP requirements. We were very pleased with the quality of the code and the documentation. Technical support was perfect during the entire engagement, always prompt and relevant. The ASIC implementation of the core performed as expected in the first tape-out. As an early-phase start-up with a tight R&D budget, Solantro benefitted from an excellent technical and business partnership with EnSilica, allowing us to move to the next level.

Christian Cojocaru
Director IC Engineering
Solantro Semiconductor Corp.

Solomon Systech

Solomon Systech

The solution developed by EnSilica, with its excellent features, has enhanced greatly the functionality of our product. We look forward to joining hands again with the team to develop more high-performance IC solutions

Ken Tsui
Vice PresidentDesign Engineering
Solomon Systech Limited.

Thomson

Thomson

“EnSilica were selected by Thomson for the development of a very important subsystem- one of the most complex designs I have specified. The result was excellent (a few bugs were caused by ambiguities in the specification) and the value for money was even better (very autonomous work, reasonable requests for support). The true reason I recommend EnSilica is integrity. The contract was fixed price. They notified us early about their problems and then worked even harder to fix them in time. Contrary to other companies I have worked with, they did not play games to get more money. If they commit to a deadline and a budget, then they will deliver. If you have an RFQ for an important design task requiring senior engineers, you should send it to EnSilica.”

Xavier Duret
IC Technical Lead

Xsilon

Xsilon

Ensilica were knowledgeable, flexible and responsive to the needs of our system level design project. The contribution they made to modelling and evaluating the transceiver performance helped us greatly in achieving our goals and saved us a great deal of time.

Mike Baker
CEO

Xtendwave

Xtendwave

Xtendwave licensed EnSilica’s eSi-3200 32-bit processor core to power our EverSet® time code receiver solution for decoding the WWVB atomic timekeeping signal. The processor IP came fully integrated with a complete set of peripherals, memories for our chosen technology and external interfaces to connect our own IPs. EnSilica provided Xtendwave with a version of eSi-3200 optimized for the EverSet® application, configuring it to reduce the overall processor gate count significantly compared to the competing solution. The optimized version also featured custom trigonometric instructions reducing cycle count by 30% and a 2Kbyte reduction in valuable memory space.

EnSilica also provided additional services including full RTL to GDSII development services and development of scan vectors and software for memory testing and BIST to support our IC production. The services were delivered to schedule and budget and always to a high quality. EnSilica’s team was easy to work with and provided us with the expertise and skills we needed to get a quality solution in a very short timeframe. We would recommend EnSilica to any fabless semiconductor company looking to accelerate their chip development.

Tom Jung
Senior Design Engineer
Xtendwave
December 2013