Latest News


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EnSilica launches eSi-ECDSA cryptographic IP for standards-compliant automotive Car2x communications

Wokingham, UK - Monday 9th May 2016. EnSilica, a leading independent provider of semiconductor solutions and IP, has launched the eSi-ECDSA cryptographic IP designed to help meet the high security communication and latency requirements of automotive Car2Car and Car2Infrastructure (Car2x) applications that form part of today’s emerging Intelligent Transport Systems.
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Increasing Demand and Continued Growth Puts EnSilica on Recruitment Path for Engineers; Makes Senior Level Appointments

Increasing demand and continued growth puts EnSilica on recruitment path for engineers; Makes senior level appointments. Mark Hodgkins is appointed as Executive Chairman and David Doyle as Sales Director. EnSilica plans to recruit in excess of 12 additional engineering staff in the UK and 20 in India to support the continued increasing demand for ASIC and FPGA development

Older Press Releases

ENSILICA EXHIBITING AT ANNUAL DESIGN AUTOMATION CONFERENCE

The annual Design Automation Conference is one of the industry’s premier events and EnSilica will be exhibiting for the fourth successive year.

 

51DAC_logo__150_61For those who are attending, do drop by our stand (#1401) where we will be showcasing some of our customers products based on EnSilica’s IP – including our highly configurable eSi-RISC embedded processor. We can also provide details on the continuing expansion of our design services offering and latest news on our Zynq based eSi-Module – now ready for production orders.

If you cannot attend DAC 2014, but would like to learn more about new IP and services, or you have a specific IC design opportunity you would like to discuss with us, then browse our website for more information or contact us using our contact form

ENSILICA VISIT GLOBAL FOUNDRIES SEMINAR

The annual Design Automation Conference is one of the industry’s premier events and EnSilica will be exhibiting for the fourth successive year.

51DAC_logo__150_61For those who are attending, do drop by our stand (#1401) where we will be showcasing some of our customers products based on EnSilica’s IP – including our highly configurable eSi-RISC embedded processor. We can also provide details on the continuing expansion of our design services offering and latest news on our Zynq based eSi-Module – now ready for production orders.

If you cannot attend DAC 2014, but would like to learn more about new IP and services, or you have a specific IC design opportunity you would like to discuss with us, then browse our website for more information or contact us using our contact form.

June 2014

ENSILICA EXHIBITING AT DAC2013

EnSilica are exhibiting at DAC 2013 in Austin, Texas

3-5th June

The annual Design Automation Conference is one of the industry’s premier events and EnSilica will be exhibiting for the third successive year.

For those who are attending, do drop by our stand (#1336) where we will be showcasing some of our customers products based on EnSilica IP. We can also provide an update on the expansion of our design services offering, IP and VIP developments and a preview of our new Zynq eSi-Module

If you cannot attend DAC 2013, but would like to learn more about our new IP and services, or you have a specific IC design opportunity you would like to discuss with our technical team, then visit our website www.ensilica.com for more information or email us at info@ensilica.com

May 2013

POSEDGE STANDARDIZES ON eSi-3250 PROCESSOR

Posedge standardizes on EnSilica’s eSi-3250 processor for wired/wireless networking IP solutions

Posedge new 12-core Wireless Packet Processor solution for application-aware WLAN access points and LTE basestations Includes innovative new 12-core Wireless Packet Processor solution for application-aware WLAN access points and LTE basestations
EnSilica, has announced that Posedge has standardized on its eSi-3250 32-bit processor core  for the processing engine architecture for its range of wired/wireless networking IP solutions. The decision to standardize on the eSi-3250 has enabled Posedge to develop a single, flexible hardware architecture for multiple products that are also future-proofed for different protocols. Posedge chose the eSi-3250 over alternative solutions due to its scalability, programmability, low power consumption and competitive licensing model.

To download the complete Press Release click here

June 2012

XTENDWAVE LICENCES eSi-3200

Xtendwave selects EnSilica’s eSi-3200 processor for the receiver IC implementing NIST’s next-generation WWVB atomic timekeeping signal

Xtendwave license eSi-RISCEnSilica has announced that Xtendwave has licensed its high-performance eSi-3200 32-bit processor core to power Everset™, Xtendwave’s time code receiver solution for the next-generation WWVB atomic timekeeping signal. The new signal, broadcast by NIST (the National Institute of Standards  and Technology), a US Government agency, will represent the official time of the USA and includes the implementation of daylight saving time and leap seconds.

To download the complete Press Release click here

May 2012

ENSILICA ACHIEVE XILINX CERTIFIED MEMBER STATUS

The award of Certified Member status to EnSilica demonstrates expertise on the latest Xilinx devices and implementation techniques and the ability to consistently deliver high quality products and services on Xilinx programmable platforms.

Xilinx Certified MemberCertified Members have invested in passing a comprehensive 320-point review of their technical, business, quality, and support processes and have committed engineers to passing the same rigorous training used by Xilinx Field Application Engineers worldwide. Certified Member engineers annually refresh Certification training to ensure they have updated expertise on the latest products and technologies from Xilinx.

April 2012

JOIN US AT DAC 2012!

EnSilica will be exhibiting at the 49th Design Automation Conference,  San Francisco.

 

ImageFrom June 3-7th, the 49th Design Automation Conference will be held at the Moscone Center in San Francisco and EnSilica will be there.

Our team will be available to  discuss how our IC design services and IP portfolio can help get your next silicon project to market.

Come and see us at Booth #2827

Mar 2012

ENSILICA ANNOUNCES NEW DESIGN CENTRE IN INDIA

EnSilica plans to recruit 30 skilled verification specialists in 2012

ImageEnSilica has opened a new design centre in India (Bangalore), to complement its existing design
facilities in the UK. The new design centre will be a centre of excellence for the advanced verification of
complex semiconductor products and IP. Verification services will be provided for both European and local customers based on a range  of methodologies but with a particular focus on UVM (the Unified Verification Methodology) and SystemVerilog.

To download the full press release  read here

Jan 2012

ENSILICA LAUNCHES NEW VERSION OF eSi-RISC DEV SUITE

New capabilities include multicore support, significantly enhanced compiler performance and ultra low-power applications support

ImageEnSilica has launched the eSi-RISC Development Suite v2.5, a major new version of its complete development environment for evaluating the EnSilica family of eSi-RISC highly configurable and low-power soft processor cores and the development of embedded applications. The eSi-RISC Development Suite v2.5 features new capabilities for multicore support, significantly enhanced compiler performance and ultra low-power applications support.

To download the full press release  read here

Nov 2011

USB CONNECTIVITY FOR eSi-RISC PROCESSORS

EnSilica and Evatronix collaborate on USB connectivity for eSi-RISC processor

EnSilica has announced a collaboration with silicon Intellectual
Property (IP) provider, Evatronix SA, to offer fully featured eSi-RISC processor SoC solutions incorporating USB 1.1, 2.0 and 3.0 connectivity. The collaboration with Evatronix adds an important building block to EnSilica’s strategy of providing customers with eSi-RISC processor sub-systems complete with integrated peripherals. The collaboration also broadens the Evatronix USB IP sub-system portfolio with RISC processor combinations.

To download the full press release  read here

June 2011

POSEDGE LICENCES eSi-3250 PROCESSOR

ImageEnSilica has announced that Posedge, a semiconductor intellectual property and solutions provider based in Sunnyvale (California, USA), has licensed its high-performance eSi-3250 32-bit processor core for an innovative,    7-core Residential and SMB Gateway solution that performs Wire-Speed Routing at multi-gigabit rates. Posedge will initially use its next generation Residential and SMB Gateway processor in a 40nm SoC project it is currently developing for a customer. Posedge is using both EnSilica’s Windows and new Linux-based toolchain to underpin the development process.

To download the full press release  read here

9th May 2011

DONGBU HiTek LICENCES eSi-RISC PROCESSOR CORES

ImageEnSilica has announced that Korea’s Dongbu HiTek has licensed the eSi-1600, part of the eSi-RISC family of embedded processor cores.

Dongbu HiTek, a world leader specialty foundry, chose EnSilica’s eSi-1600 on a cost / performance basis following extensive evaluation against other established, small footprint embedded RISC processors.

To download the full press release  read here

27th January 2011

ENSILICA SHORTLISTED FOR 2010 ELEKTRA AWARDS

ImageEnSilica are proud to announce they have been shortlisted in the ‘Embedded System Product of the Year’ category in the 2010 Elektra Awards for their highly configurable 16/32 bit embedded processor : eSi-RISC.

About eSi-RISC :

eSi-RISC is a highly configurable microprocessor for embedded systems, that scales across a wide range of applications. It is unique in being the only processor architecture scalable from 16 to 32 bits, and encompassing optional SIMD, floating point and custom instructions. Furthermore the memory architecture can be configured for Harvard or VonNeuman TCM, or to include data and program caches. Using a mix of 16 and 32-bit instructions it gives exceptional code density, reducing the program code size by up to 40%, whilst the minimum configuration can be implemented in as little as 8k ASIC gates, providing class leading overall silicon area and very low power.

The processor is supported by a C/C++ Integrated Development Suite built on Eclipse and running tools derived from the industry standard GNU toolchain. The Development Suite debugger simulates code within the IDE, connected to a hardware simulation, or emulated on either an Altera Cyclone III or Xilinx Spartan 6 FPGA evaluation board.

About Elektra :

The established annual highpoint of the electronics industry, the Elektra Awards gives the industry the opportunity to recognise the achievements of individuals and companies across Europe. They are designed to promote best practice in key areas including, innovation, sales growth and employee motivation.

The winners will be announced at an Elektra Awards Dinner and Christmas Party which takes place on Thursday 9th December at the Lancaster London Hotel.

For more information please follow links to eSi-RISC or Elektra

15th November 2010

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