Life at EnSilica

EnSilica is all about the people we employ; people who not only have immense engineering talent, but the drive and enthusiasm to apply it across a diverse range of challenging projects.

EnSilica is committed to creating a diverse work environment and is proud to be an equal opportunity employer.

We measure our success by customer satisfaction and the quality of the solutions, services and designs we deliver. Our approach is to develop long-term relationships with our customers and encourage strong partnerships with our suppliers, while providing meaningful and challenging work for our staff in a friendly, professional working environment. The company is headquartered in Oxford, UK and has offices in India and Brazil.

What we Believe In

• Listen well and demonstrate humility
• Trust colleagues, assume good intent
• Collaborate across boundaries
• Seek out diverse thought and background
• Show empathy for others

Our Culture

EnSilica has the mindset for growing it’s operations and expanding the range of services and products it offers. This mindset is backed by a) a solid strategy for becoming a significant player in the global market of chip design & supply, and b) competent management that execute this strategy successfully. EnSilica also gives staff the opportunity to continuously grow their skills and competencies and keep them in the forefront of the silicon industry’s professional standards.

ChristosEnSilica Engineer

A good work culture is directly proportional to good productivity. At Ensilica, we have very healthy global work culture which brings out best of their capabilities and skills of an employee. Happy to be part of Ensilica family

NarasimhaEnSilica Engineer

Ensilica is a great place to work. The projects are diverse and challenging and the Engineering team’s are some of the best.

CraigEnSilica Engineer

For every good start in our career a very basic foundation should be strong ,inspite of getting all the theoretical knowledge from the college hands on experience/industrial knowledge is very important with a good MENTOR. I found the best ones at ENSILICA

KavyaEnSilica Engineer

Ensilica’s work culture is the opportunity and flexibility it gives me to learn and shape my career the way I imagine it to be. For me it’s the opportunity to diversify your knowledge and skill set, and grow within the company that stands out. There seems to be a genuine culture of wanting to support one another.

AlemEnSilica Engineer

Ensilica is a great place to work, Here we create a culture of innovation. We always feel appreciated , Motivated, and empowered

YuktiEnSilica Engineer

EnSilica is a great place to work. The culture is transparent, every employee is given a chance to be heard, with ample opportunities for those who want to build a career here. It is an organization with an innovative and entrepreneurial approach that distinguishes it from its competitors. EnSilica’s flexible approach to work is ideal for an excellent work life balance, so that I can spend time with my family and kids

GabrieleEnSilica Engineer

EnSilica always gives me an opportunity to learn by working with the right people and giving the freedom to express and be creative in problem solving.

ArunEnSilica Engineer

My induction was excellent – being mentored for the first few months with regular 1 2 1 sessions, so that I quickly understood company procedures and processes. I like to think I am fully integrated into the EnSilica family.

WayneEnSilica Engineer

I joined EnSilica as a fresh graduate out of university; over the last three years I have had support and mentoring from all of the friendly and highly knowledgeable team. EnSilica projects are always interesting, engaging and more than often – challenging (but that is where the fun is!).

JamesEnSilica Engineer

I joined EnSilica as a graduate engineer and have, since then, had invaluable opportunities to broaden my knowledge about the industry. The projects undertaken here are diverse and interesting and the senior engineers are approachable and always eager to answer questions. I look forward to my future at EnSilica and the many more things I am sure to learn working here.

OmotadeEnSilica Engineer

I really enjoy being part of a very knowledgeable and supportive team

KonstantinosEnSilica Engineer

Ensilica’ s support for employees’ ability to learn and translate that learning into action is commendable.

DivyaEnSilica Engineer

Work Life Balance

Work Life Balance

Our Vision

  • To be our customers’ preferred ASIC supplier.
  • Through our flexibility, engineering excellence and quality focus, EnSilica strives to increase our customers’ competitiveness, through the use of custom ASICs.
  • To create a profitable, value creating company based on the design & supply of digital, analog and mixed signal IC’s.
  • To be considered a great company by our key stakeholders – customers, suppliers and staff.
  • To build value over the coming years that will deliver financial benefit to all staff through a stock-option scheme.

Our Values

  • To treat our employees and contract staff with dignity, respect and equality.
  • We understand the importance of diversity as a driver for innovation and success.
  • To recognise and reward the contributions and accomplishments of our employees.
  • To provide a dynamic and enjoyable working environment, where staff have the opportunity to work on varied, interesting and challenging projects.
  • To continually strive for improvement through training and learning.

If you currently work in ASIC development and are ready to take your next career step then please send us your details. We are always looking for the brightest and best engineers in the country – people who can really make a difference.

Information for Recruitment Agencies

Please note that EnSilica does not accept unsolicited CVs or sales calls. Agencies should, therefore, not contact us on a speculative basis.

UK Opportunities

Position : Office Manager/Office Administrator
Job Ref. : EN-011614
Location : Milton Park, Abingdon, UK

EnSilica develops custom silicon chips for leading product companies and provide design services for companies with their own semiconductor design teams.

The company has world-class expertise in supplying custom analog, mixed signal and digital ICs to its international customers in the automotive, industrial, healthcare and consumer markets. It’s our exceptional people that make us who we are.

We are an equal opportunity employer and value diversity in our workplace. We do not discriminate, and work to create an inclusive culture across our business.

The role

As part of our continuing growth and a move back towards more office-based working, we have an opening for an enthusiastic Office Manager to cover all aspects of office administration and facilities management within our Milton Park office. This includes overseeing H&S at the site and providing admin support for HR activities (e.g. recruitment, induction, staff meetings etc).

The role will report into the UK Office Manager, but you will also work closely with members of the Management Team on a day-to-day basis to ensure the smooth-running of the office.

We understand that you might not be familiar with the technical side of our business, but you will be motivated to deliver a productive working environment to support our future success.

Hours are negotiable, but a minimum of 20 hours per week, over 5 days.

Key tasks & responsibilities

  • Facility Management – ensuring office is tidy, presentable, and fit for purpose, arranging maintenance and improvements as required. Ensure any faults are fixed and recorded.
  • General office administration
    • Reception duties, meeting and greeting visitors and receiving deliveries
    • Answering telephone and taking messages
    • Ordering and maintaining stocks of office and catering supplies
    • On-line purchasing
    • Facilitating on-site meetings, catering, refreshments, equipment set-up etc.
    • General support to managers and staff as require
  • H&S Committee member, with responsibility for H&S arrangements and documentation for Milton Park and Sheffield offices
  • Assist with HR system and processes such as training records, recruitment, and induction.
  • Support customer events and external meetings
    • Setting up external conference locations etc
    • Co-ordinating and booking business travel & hotels
    • Support for marketing activities
  • Help drive a positive work environment – culture, team-building, social events etc.
  • Drive environmental improvements in how we manage our facilities and business.
  • Working closely with our other offices in the UK and oversees to support activities between the different sites e.g. staff visits, secondment / transfer of staff, sharing of information etc.
  • Liaising with colleagues in other locations e.g. India and Brazil to share good practice and learn new ideas.
  • Cost-Management
    • Be proactive in identifying better procedures / ways-of-working that will deliver efficiency savings.
    • Management of suppliers to reduce costs

Key Skills & background:

  • Background in Office Administration
  • Facilities Management experience
  • Health & Safety Management/Administration experience
  • Attention to detail and accurate data entry skills
  • Prior experience in supporting HR activities would be beneficial, or you have a real interest in the ‘people side’ of an office as well as the physical building. An understanding of how the office environment, culture and social aspects can improve the experience for everybody. This is particularly important post-Covid as we re-adjust to a new ‘hybrid’ working approach – combining more office working alongside continuation of some remote working.
  • EnSilica is virtually a paperless office – almost all of our work processes are based around our Document Management System, where electronic documents are created, modified, reviewed and approved on-line. You will be comfortable not just with using this type of system, but also developing new processes that improve how information is organized and used.
  • Strong Microsoft Office skills – Outlook, Word, Excel, Powerpoint, Teams (see Appendix for more details)

Personal Skills:

  • Excellent communication and interpersonal skills
  • Good administrative skills with an exceptional eye for detail and accuracy.
  • Proactive and self-motivated
  • Take ownership of problems, creative problem-solving
  • Strives for continual improvement, personal and process
  • Team player

Position : Electronics Test Technician Apprentice
Job Ref. : EN-008019
Location : Abingdon, Oxfordshire, UK
Apply Now

EnSilica develops custom silicon chips for leading product companies and provide design services for companies with their own semiconductor design teams.

The company has world-class expertise in supplying custom analog, mixed signal and digital ICs to its international customers in the automotive, industrial, healthcare and consumer markets. It’s our exceptional people that make us who we are.

We are an equal opportunity employer and value diversity in our workplace. We do not discriminate, and work to create an inclusive culture across our business.

The role

  • An exciting opportunity for a Test Technician Apprentice to join our friendly and inclusive Engineering team. As a Test Technician, you will learn to provide a high level of test and general engineering support to the engineering team and business.
  • Assisting the Senior Test Engineer with tasks and general duties is an everyday part of the role. This might include helping with validation testing, test equipment calibration and control, PCB builds, including soldering, and other tasks as required.
  • You will be an integral part of the team responsible for maintaining an efficient and accurate engineering test function within a business.
  • While working as an Apprentice Test Technician you will be required to complete a Higher National Certificate (HNC) Electrical/Electronic qualification. Training will be provided by a selected provider and you will attend College and/or complete online. You will be allowed one day a week dedicated to apprenticeship training, this can be done in College or at your place of work.
  • You will gain in-depth knowledge of electronic testing and also gain experience in schematic capture and PCB layout, PCB build and rework including soldering of surface mount and leaded components which will complement your technical studies.

Key Tasks & responsibilities

  • Assist with setting up/preparing test equipment and test benches ready for arrival of IC’s to be tested.
  • Assist with developing software for testing.
  • Assist with performing tests and collecting test result data.
  • Carrying out PCB builds and rework including soldering surface mount components.
  • Assist with the test equipment inventory making sure all relevant items being used are calibrated and serviceable.
  • Assist with schematic capture and PCB layout.
  • Carry out general laboratory duties as detailed.
  • Ad-hoc duties

Key skills & background

  • You will have A-levels in physics or electronics, or BTEC level 3 in Engineering.
  • You will have a keen interest in electronics and computers and demonstrate an enthusiasm and aptitude for the skills taught in the Apprenticeship.
  • Basic understanding of electronic circuits.
  • Understanding and use of basic test equipment.
  • Attention to detail, ability to recognize and rectify errors.
  • Excel spreadsheet skills and understanding of how to extract and analyze.

Personal Skills:

  • You will be ready to take on the challenge of working with us as an apprentice and have a positive, proactive approach to work.
  • Good self-organization and time management, with the ability to plan ahead for self and team.
  • Ability to work independently.
  • Self-motivated.
  • Take ownership of problems.
  • Creative problem solving.
  • Team player

Key Benefits

  • 26 days holiday per annum, increasing to 27 days after 5 years and 28 days after 10 years (in addition to 8 bank holidays per annum).
  • Subsidized (50%) private healthcare cover for employee and partner.
  • Matched pension contribution up to 5%
  • 4x salary life assurance.

APPLY NOW

Position : IT Apprentice
Job Ref. : EN-008020
Location : Abingdon, Oxfordshire,UK

EnSilica develops custom silicon chips for leading product companies and provide design services for companies with their own semiconductor design teams.

The company has world-class expertise in supplying custom analog, mixed signal and digital ICs to its international customers in the automotive, industrial, healthcare and consumer markets. It’s our exceptional people that make us who we are.

We are an equal opportunity employer and value diversity in our workplace. We do not discriminate, and work to create an inclusive culture across our business.

The role

  • An exciting opportunity for an IT Apprentice to join our friendly and inclusive team. As an IT Apprentice, you will learn a range of networking, Windows and Linux IT skills.
  • You will assist the IT support team with tasks and general duties. This might include sorting out IT issues or configuring a new PC.
  • You will be an integral part of the team responsible for maintaining a mixed Windows and Linux infrastructure, using the latest cyber security applications.
  • While working as an IT Apprentice you will be required to complete a Network Engineering Level 4 or similar qualification. Training will be provided by a selected provider and you will attend College and/or complete online. You will be allowed one day a week dedicated to apprenticeship training this can be done in College or at your place of work.
  • You will gain practical in-depth knowledge of IT, networking and cyber security which will complement your technical studies.

Key Tasks & responsibilities

  • You should have a minimum of A-level in Computing, or BTEC in Computing/IT and demonstrate an enthusiasm and aptitude for the skills taught in the Apprenticeship.
  • Keen interest in computers including Linux or Windows operating systems.
  • Committed to completing a 12 – 18-month apprenticeship.
  • Good general IT/Microsoft Office and communication skills.
  • Problem solving skills and a good attention to detail.
  • Willingness to learn, with flexibility to adjust to new challenges.
  • A driving license and your own transport would be an advantage.

Personal Skills:

  • You will be ready to take on the challenge of working with us as an apprentice and have a positive, proactive approach to work.
  • Good self-organization and time management, with the ability to plan ahead for self and team.
  • Ability to work independently.
  • Self-motivated.
  • Take ownership of problems.
  • Creative problem solving.
  • Team player

Key Benefits

  • 26 days holiday per annum, increasing to 27 days after 5 years and 28 days after 10 years (in addition to 8 bank holidays per annum).
  • Subsidized (50%) private healthcare cover for employee and partner.
  • Matched pension contribution up to 5%
  • 4x salary life assurance.

Position : IC Project Manager
Job Ref. : EN-007732
Location : Oxford / Flexible,UK

EnSilica is a leading IC design house with a consistent record of financial growth and technical excellence since its formation in 2001.

Our experienced silicon team are able to deliver a complete digital, RF and mixed-signal ASIC for our customers – from specification through to GDSII tape-out and production silicon.

We also provide high quality design services to supplement your own IC engineering team and are specialists in complex SoC and FPGA-based embedded systems, including hardware and embedded software development. The EnSilica portfolio of IP includes families of IP covering communications, encryption and radar accelerators.

Our impressive record of success has been achieved working with customers ranging from start-ups to blue-chip companies. The company is headquartered in the UK and has offices in India and the USA.

The role

We are seeking an experienced IC program/project manager to support our custom integrated circuit design and supply business. The candidate must have a proven track record of taking silicon products from concept through to volume production.

Key tasks & responsibilities

  • Support pre-sales activities – working with the sales team to plan and cost new opportunities, including liaising with external IP suppliers and technology providers to deliver a winning proposal.
  • To take full ownership for the delivery of Design and Supply projects from specification phase through to release of the IC to mass production. To demonstrate strong leadership in driving the project team to deliver high quality outcomes within demanding project schedules, focused on a forward-looking mindset to identify and mitigate risks, remove barriers and meet the project objectives.
  • Responsibility for ensuring project objectives are delivered within the planned costs and timescales to fully meet the customers’ expectations and deliver the expected profitability. This includes strong management of design changes that could impact the development budget and schedule.
  • To ensure that the processes relating to the design and supply of silicon products within our ISO9001 Quality Management System are rigorously applied to ensure projects are executed in a consistent and effective manner that delivers high-quality outcomes. This includes contributing to the continual improvement of our processes to enable better support of future projects.
  • Providing clear status reporting to the EnSilica Management team and customers on key project metrics.
  • To build strong customer relationships that enhances the reputation of EnSilica and helps drive long-term repeat business.

Key skills / Background

  • The successful candidate will have a track record of managing multi-disciplined IC projects and engineering teams covering digital design, verification, physical implementation, analogue and mixed signal, silicon validation, embedded software and hardware.
  • Proven leadership skills to influence and drive the project team forward, knowing that the projects will be challenging and demanding.
  • Ability to identify and resolve issues quickly and gain the respect and support of the team.
  • Efficient time management and the ability to proactively drive multiple projects often across multiple locations.
  • Experience of IC projects within the automotive industry, Functional Safety (FuSa) applications or advanced technology nodes (<12nm) would be an advantage.
  • Reporting to the Director of Projects you will be given the opportunity to take ownership for key projects and make a real contribution to the strategic objectives of the company.
  • The position offers a competitive salary, bonus and benefits package.

Personal Skills

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Position : Senior/Principal Physical Design Engineer
Job Ref. : ENS-201027A
Location : Flexible,UK

As part of our ongoing expansion, EnSilica need to strengthen our ASIC Implementation team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will have a strong academic record and 5-10 years experience in IC Physical Design (PD) using advanced digital ASIC development flows.

You will have a solid track-record and be familiar with the challenges of implementing complex ASIC/SoC designs from RTL to tapeout-ready GDSII, preferably in process nodes down towards 5nm.

The candidate should have customer and supplier-facing experience and excellent communication skills.

Key responsibilities

  • Take full-flow ownership of all stages of the digital RTL-to-GDSII implementation flow for complex block-level or full-chip ASIC designs.
  • Work closely with our customers and other EnSilica teams to deliver projects on-time and to the required performance and quality levels.
  • Setup, run, and maintain EDA tool flows, as needed, for each stage of the development flow.
  • Follow EnSilica’s ISO Quality Management System requirements for implementation, reviews, and reporting.
  • Keep up to date with all aspects of advanced ASIC implementation methodology and best-practice to ensure that EnSilica’s expertise and services are always current and appropriate for each customer project.

Key Skills / Background

  • 1st or 2.1 Electronics, Physics or relevant subject from a Tier 1 group University.
  • 5-10 years experience in industry with a strong track record in Physical Design gained across several successful ASIC projects, and at process nodes down to ~7nm.
  • Ability to quickly and efficiently solve problems, working both independently and with support from colleagues, our suppliers, and our customers where needed.
  • Extensive hands-on experience with either Synopsys ICC1/2 or Cadence Innovus for block-level and/or full-chip physical design, preferably down to ~7nm FF.
  • RTL synthesis using Design Compiler or Genus, including DFT/scan-insertion.
  • Power-management implementation using UPF/CPF, including verification and power estimation.
  • Timing closure and STA, including constraint development and verification.
  • IR-drop/EM modelling, analysis and verification.
  • Setup, use, and verification of RC extraction flows.
  • Ability to setup, run, and debug DRC/LVS/ERC/DFM using at least one of the main EDA tool sets.

Desirable skills

  • Team leadership or technical management.
  • Experience in foundry tapeout.
  • ASIC package development and package/die co-design.
  • Foundry, Packaging, and IP supplier engagement and management.

Personal Skills

  • Ability to take full ownership of a task from initial assignment through to successful completion and sign-off
  • Quality-driven approach
  • Excellent communication and interpersonal skills
  • Self-motivated and adaptable
  • Take ownership of problems
  • Strong/Creative problem-solving skills
  • Good team player

Job Reference: ENS190701 – Senior/Principal Design-For-Test (DFT) Engineer

Location: Flexible,UK

The Role

As part of our ongoing expansion, EnSilica need to strengthen our ASIC Implementation team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will have a strong academic record and 5-10 years experience in Design for Test (DFT) within digital and mixed-signal ASIC/SoC development.

You will be familiar with the challenges of architecting, specifying, and implementing DFT within complex ASIC/SoC designs, most of which include power management, memories, and Analog IP elements such as PLLs, ADC/DAC, and SerDes PHY’s. You will also have experience with automatic and manual test-pattern generation flows, fault coverage analysis, and MBIST implementation.

The candidate should have customer and supplier-facing experience and excellent communication skills.

The key responsibilities and experience are summarised below:

Key Tasks / Responsibilities

  • Take full-flow ownership of all DFT, MBIST, and test-pattern generation for complex digital and mixed-signal ASIC designs on an as-needed basis to meet customer project requirements.
  • Provide Test-related consultancy to customers both in the pre-sales and implementation stages.
  • Setup, run, and maintain EDA tool flows relating to DFT, MBIST, and test pattern generation.
  • Work closely alongside the EnSilica Front-end and Back-end teams to implement and verify DFT at all stages in the development flow.
  • Take responsibility for setting and meeting customer’s fault-coverage expectations and requirements.
  • Be the primary interface between EnSilica and any back-end service companies that may be sub-contracted to develop hardware or test programs.
  • Generate test specification documentation, as required, for delivery to sub-contractors providing test services.
  • Keep up to date with all aspects of ASIC Test methodology and best-practice to ensure that EnSilica’s expertise and services are always current and appropriate for each customer project.

Key skills / Background

  • 1st or 2.1 Electronics, Physics or relevant subject from a Tier 1 group University
  • 5-10 years experience in industry with a strong track record in DFT gained across several successful ASIC projects, and ideally at process nodes down to and including 16FF
  • Specific skills in DFT implementation:
    o Specification at the architecture level
    o Implementation using tool-based and hand-crafted methods
    o Integration of IP including CPU’s, Analog Macros, and IO PHYs
    o MBIST and memory repair integration
    o Coverage analysis and improvement to meet targets
    o ATPG, as well as manual and semi-automatic TPG, including simulation-based methods
    o Implementation of at-speed test methodologies
    o DFT for power-managed designs
    o Generation of STA and scenario/mode constraint
  • Knowledge of the full Synopsys or Mentor Tessent DFT tool kit(s) would be advantageous, including the use of LEQ, simulators, and STA tools for verification.
  • Working knowledge of the complete SoC design flow and associated tools and methodologies to deliver working silicon
  • Experience of RTL and gate-level simulation as applied to DFT verification
  • VHDL/Verilog coding skills
  • Experience working with test service providers is desirable, including test hardware specification, test program specification, test program bring-up and debug, yield analysis and enhancement

Personal Skills

  • Excellent communication and interpersonal skills
  • Adaptable
  • Strong/Creative problem-solving skills
  • Organised and efficient with demonstrated ability to meet deadlines
  • Good team player
  • Self-motivated
  • Take ownership of problems
  • We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, life assurance and share options scheme.

Job Reference: ENS190201 -SoCDE : SoC DESIGN ENGINEER

Location: Flexible,UK

The Role

As part of our ongoing expansion, EnSilica are looking to strengthen our front-end digital design team, by recruiting a principal level SoC Design Engineer. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will be self-motivated, have a strong academic record with a sound understanding of SoC design principles, and 10+ years’ experience in digital or mixed-signal SoC development.

The key responsibilities and experience are summarised below:

Key Tasks / Responsibilities

  • Take high level requirements and write chip or block level micro-architecture specifications.
  • Ability to undertake die-sizing, power estimation, technology selection etc to define an optimal solution for a given IC development.
  • Comfortable working with external suppliers (foundries, IP vendors, EDA companies) and proven experience in building strong relationships with the end customer and support the EnSilica sales team in developing winning proposals.
  • Strong hands-on experience in RTL coding of modules, sub-system or full-chip (primarily Verilog or SystemVerilog)
  • Selection and integration of 3rd party IP into a SoC design
  • Ability to lead a digital team on a SoC project – mentoring and reviewing the work of colleagues and ensuring that code quality is at the highest level and consistent with coding guidelines and applicable quality processes.
  • Chip level integration and liaising with implementation and physical design staff to ensure that the RTL code is optimised and aligned with the requirements of the back-end team.

Key skills / Background

  • Good Bachelors Degree in Electronic Engineering or related discipline.
  • Extensive experience as a digital designer or digital lead in a number design of turn-key SoC developments, ideally across a range of application areas.
  • A good understanding of the complete SoC flow from specification through to tape-out, validation and test.
  • Good working knowledge of verification techniques and methodologies and proven ability to de-bug issues in a structured and timely way.
  • Low power design expertise

Beneficial Skills

  • Experience of designing for automotive or safety critical applications would be an advantage.
  • Good knowledge of DFT techniques and the impact on the RTL design
  • VHDL coding knowledge
  • Analog design knowledge or experience of working on mixed-signal SoC developments.
  • Experience of FPGA design and associated tools

Personal Skills

  • Excellent communication and interpersonal skills
  • Adaptable
  • Strong/Creative problem-solving skills
  • Organised and efficient with demonstrated ability to meet deadlines
  • Good team player
  • Self-motivated
  • Take ownership of problems
  • We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, life assurance and share options scheme.

The Role

As part of our ongoing expansion, EnSilica need to strengthen our verification team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business

With 10+ years experience in industry you will relish the opportunity of working on a diverse range of projects that will both challenge and develop your verification skills.

You will have an excellent understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end-customer for the chosen approach. You understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process.

As you rapidly build your verification skills through engagement on a broad range of projects you will have the opportunity to take on the role of verification lead, with responsibility for architecting the test environment and driving the other team members to deliver the agreed solution.

Ideally you will be familiar with both Mentor Questa and Cadence Incisive tools.

The key responsibilities and experience are summarized below:

Key Tasks / Responsibilities

  • Verification specialist working on customer and internal projects – including as the verification lead.
  • Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods.
  • As a verification lead you would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment.
  • Active participation in the verification community to drive the introduction of new and effective techniques within our business – to help solve the verification challenges faced by our customers.
  • To support business development by working with potential customers to understand their verification requirements and develop innovative technical solutions to achieve new design wins.
  • Close working with our customers to build a strong relationship that results in repeat business.

Key Skills / Background

  • 1st or 2.1 Electronics, Physics or Computer Science from a Tier 1 group University
  • 10+ years experience in industry working on a variety of verification projects
  • Extensive knowledge of verification methodologies particularly UVM and SystemVerilog
  • Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests
  • Expert in the planning and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog.
  • Experience as verification lead on at least one project.
  • Strong VHDL/Verilog RTL

Personal Skills

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

The Role

As part of our ongoing expansion, EnSilica need to strengthen our verification team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business

With 5-10 years experience in industry you will relish the opportunity of working on a diverse range of projects that will both challenge and develop your verification skills.

You will have a good understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end-customer for the chosen approach. You understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process.

As you rapidly build your verification skills through engagement on a broad range of projects you will have the opportunity to take on the role of verification lead, with responsibility for architecting the test environment and driving the other team members to deliver the agreed solution.

Ideally you will be familiar with both Mentor Questa and Cadence Incisive tools.

The key responsibilities and experience are summarized below:

Key Tasks / Responsibilities

  • Verification specialist working on customer and internal projects – sometimes as the verification lead.
  • Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods.
  • As a verification lead you would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment.
  • Active participation in the verification community to drive the introduction of new and effective techniques within our business – to help solve the verification challenges faced by our customers.
  • Close working with our customers to build a strong relationship that results in repeat business.

Key skills / Background

  • 1st or 2.1 Electronics, Physics or Computer Science from a Tier 1 group University
  • 5-10 years experience in industry working on a variety of verification projects
  • Extensive knowledge of verification methodologies particularly UVM and SystemVerilog
  • Strong experience in the specification and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog
  • Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests
  • Strong VHDL/Verilog RTL

Personal Skills

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Brazil Opportunities

Position : Senior Verification Engineer
Job Ref. : EN-210630
Location : Porto Alegre, Brazil

The role

As part of our ongoing expansion, EnSilica needs to strengthen our verification team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

With 5-10 years experience in industry you will relish the opportunity of working on a diverse range of projects that will both challenge and develop your verification skills.

You will have a good understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end-customer for the chosen approach. You understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process.

As you rapidly build your verification skills through engagement on a broad range of projects you will have the opportunity to take on the role of verification lead, with responsibility for architecting the test environment and driving the other team members to deliver the agreed solution.

Ideally you will be familiar with both Mentor Questa and Cadence Incisive tools.

Key Tasks & responsibilities

  • Verification specialist working on customer and internal projects – sometimes as the verification lead.
  • Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods.
  • As a verification lead you would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment.
  • Active participation in the verification community to drive the introduction of new and effective techniques within our business – to help solve the verification challenges faced by our customers.
  • Close working with our customers to build a strong relationship that results in repeat business.

Key skills & background

  • Electronics, Physics or Computer Science from a Tier 1 group University
  • 5-10 years experience in industry working on a variety of verification projects
  • Extensive knowledge of verification methodologies particularly UVM and SystemVerilog
  • Strong experience in the specification and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog
  • Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests
  • Strong VHDL/Verilog RTL

Personal Skills:

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, meal tickets, life assurance and share options scheme.

Position : Principal Verification Engineer
Job Ref. : EN-210630A
Location : Porto Alegre, Brazil

The role

As part of our ongoing expansion, EnSilica needs to strengthen our verification team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

With 10+ years experience in industry you will relish the opportunity of working on a diverse range of projects that will both challenge and develop your verification skills.

You will have an excellent understanding of different methodologies, but particularly SystemVerilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy and gain the support of the end-customer for the chosen approach. You understand the importance of monitoring key metrics to assess progress and predict the end-point for the verification process.

As you rapidly build your verification skills through engagement on a broad range of projects you will have the opportunity to take on the role of verification lead, with responsibility for architecting the test environment and driving the other team members to deliver the agreed solution.

Ideally you will be familiar with both Mentor Questa and Cadence Incisive tools

Key Tasks & responsibilities

  • Verification specialist working on customer and internal projects – including as the verification lead.
  • Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods.
  • As a verification lead you would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment.
  • Active participation in the verification community to drive the introduction of new and effective techniques within our business – to help solve the verification challenges faced by our customers.
  • To support business development by working with potential customers to understand their verification requirements and develop innovative technical solutions to achieve new design wins.
  • Close working with our customers to build a strong relationship that results in repeat business.

Key skills & background

  • Electronics, Physics or Computer Science from a Tier 1 group University
  • 10+ years experience in industry working on a variety of verification projects
  • Extensive knowledge of verification methodologies particularly UVM and SystemVerilog
  • Familiarity with constrained random verification methodologies, code coverage analysis and running regression tests
  • Expert in the planning and implementation of verification infrastructures, test benches, models, assertions and functional tests in Verilog and SystemVerilog.
  • Experience as verification lead on at least one project.
  • Strong VHDL/Verilog RTL

Personal Skills:

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, meal tickets, life assurance and share options scheme.

Position : SoC Design Engineer
Job Ref. : EN-210630B
Location : Porto Alegre, Brazil

The role

As part of our ongoing expansion within the Cambridge office, EnSilica are looking to strengthen our front-end digital design team, by recruiting a principal level SoC Design Engineer. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will be self-motivated, have a strong academic record with a sound understanding of SoC design principles, and 10+ years’ experience in digital or mixed-signal SoC development.

The key responsibilities and experience are summarised below:

Key Tasks & responsibilities

  • Take high level requirements and write chip or block level micro-architecture specifications.
  • Ability to undertake die-sizing, power estimation, technology selection etc to define an optimal solution for a given IC development.
  • Comfortable working with external suppliers (foundries, IP vendors, EDA companies) and proven experience in building strong relationships with the end customer and supporting the EnSilica sales team in developing winning proposals.
  • Strong hands-on experience in RTL coding of modules, sub-system or full-chip (primarily Verilog or SystemVerilog)
  • Selection and integration of 3rd party IP into a SoC design
  • Ability to lead a digital team on a SoC project – mentoring and reviewing the work of colleagues and ensuring that code quality is at the highest level and consistent with coding guidelines and applicable quality processes.
  • Chip level integration and liaising with implementation and physical design staff to ensure that the RTL code is optimised and aligned with the requirements of the back-end team.

Key skills & background

  • Bachelors Degree in Electronic Engineering or related discipline.
  • Extensive experience as a digital designer or digital lead in a number design of turn-key SoC developments, ideally across a range of application areas.
  • A good understanding of the complete SoC flow from specification through to tape-out, validation and test.
  • Good working knowledge of verification techniques and methodologies and proven ability to debug issues in a structured and timely way.
  • Low power design expertise

Beneficial Skills:

  • Experience of designing for automotive or safety critical applications would be an advantage.
  • Good knowledge of DFT techniques and the impact on the RTL design
  • VHDL coding knowledge
  • Analog design knowledge or experience of working on mixed-signal SoC developments.
  • Experience of FPGA design and associated tools

Personal Skills:

  • Excellent communication and interpersonal skills
  • Adaptable
  • Strong/Creative problem-solving skills
  • Organised and efficient with demonstrated ability to meet deadlines
  • Good team player
  • Self-motivated
  • Take ownership of problems

We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, meal tickets, life assurance and share options scheme.

Position : Senior/Principal DFT Engineer
Job Ref. : EN-210630C
Location : Porto Alegre, Brazil

The role

As part of our ongoing expansion, EnSilica needs to strengthen our ASIC Implementation team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will have a strong academic record and 5-10 years experience in Design for Test (DFT) within digital and mixed-signal ASIC/SoC development.

You will be familiar with the challenges of architecting, specifying, and implementing DFT within complex ASIC/SoC designs, most of which include power management, memories, and Analog IP elements such as PLLs, ADC/DAC, and SerDes PHY’s. You will also have experience with automatic and manual test-pattern generation flows, fault coverage analysis, and MBIST implementation.

The candidate should have customer and supplier-facing experience and excellent communication skills.

The key responsibilities and experience are summarised below:

Key Tasks & responsibilities

  • Take full-flow ownership of all DFT, MBIST, and test-pattern generation for complex digital and mixed-signal ASIC designs on an as-needed basis to meet customer project requirements.
  • Provide Test-related consultancy to customers both in the pre-sales and implementation stages.
  • Setup, run, and maintain EDA tool flows relating to DFT, MBIST, and test pattern generation.
  • Work closely alongside the EnSilica Front-end and Back-end teams to implement and verify DFT at all stages in the development flow.
  • Take responsibility for setting and meeting customer’s fault-coverage expectations and requirements.
  • Be the primary interface between EnSilica and any back-end service companies that may be subcontracted to develop hardware or test programs.
  • Generate test specification documentation, as required, for delivery to sub-contractors providing test services.
  • Keep up to date with all aspects of ASIC Test methodology and best-practice to ensure that EnSilica’s expertise and services are always current and appropriate for each customer project.

Key skills & background

  • Electronics, Physics or relevant subject from a Tier 1 group University
  • 5-10 years experience in industry with a strong track record in DFT gained across several successful ASIC projects, and ideally at process nodes down to and including 16FF
  • Specific skills in DFT implementation:
    • Specification at the architecture level
    • Implementation using tool-based and hand-crafted methods
    • Integration of IP including CPU’s, Analog Macros, and IO PHYs
    • MBIST and memory repair integration
    • Coverage analysis and improvement to meet targets
    • ATPG, as well as manual and semi-automatic TPG, including simulation-based methods
    • Implementation of at-speed test methodologies
    • DFT for power-managed designs
    • Generation of STA and scenario/mode constraint
  • Knowledge of the full Synopsys or Mentor Tessent DFT tool kit(s) would be advantageous, including the use of LEQ, simulators, and STA tools for verification.
  • Working knowledge of the complete SoC design flow and associated tools and methodologies to deliver working silicon
  • Experience of RTL and gate-level simulation as applied to DFT verification
  • VHDL/Verilog coding skills
  • Experience working with test service providers is desirable, including test hardware specification, test program specification, test program bring-up and debug, yield analysis and enhancement

Personal Skills:

  • Excellent communication and interpersonal skills
  • Adaptable
  • Strong/Creative problem-solving skills
  • Organised and efficient with demonstrated ability to meet deadlines
  • Good team player
  • Self-motivated
  • Take ownership of problems

We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, meal tickets, life assurance and share options scheme.

Position : Senior/Principal Physical Design Engineer
Job Ref. : EN-210630D
Location : Porto Alegre, Brazil

The role

As part of our ongoing expansion, EnSilica needs to strengthen our ASIC Implementation team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will have a strong academic record and 5-10 years experience in IC Physical Design (PD) using advanced digital ASIC development flows.

You will have a solid track-record and be familiar with the challenges of implementing complex ASIC/SoC designs from RTL to tapeout-ready GDSII, preferably in process nodes down towards 5nm.

The candidate should have customer and supplier-facing experience and excellent communication skills.

The key responsibilities and experience are summarised below:

Key Tasks & responsibilities

  • Take full-flow ownership of all stages of the digital RTL-to-GDSII implementation flow for complex block-level or full-chip ASIC designs.
  • Work closely with our customers and other EnSilica teams to deliver projects on-time and to the required performance and quality levels.
  • Setup, run, and maintain EDA tool flows, as needed, for each stage of the development flow.
  • Follow EnSilica’s ISO Quality Management System requirements for implementation, reviews, and reporting.
  • Keep up to date with all aspects of advanced ASIC implementation methodology and best-practice to ensure that EnSilica’s expertise and services are always current and appropriate for each customer project.

Key skills & background

  • Electronics, Physics or relevant subject from a Tier 1 group University.
  • 5-10 years experience in industry with a strong track record in Physical Design gained across several successful ASIC projects, and at process nodes down to ~7nm.
  • Ability to quickly and efficiently solve problems, working both independently and with support from colleagues, our suppliers, and our customers where needed.
  • Extensive hands-on experience with either Synopsys ICC1/2 or Cadence Innovus for block-level and/or full-chip physical design, preferably down to ~7nm FF.
  • RTL synthesis using Design Compiler or Genus, including DFT/scan-insertion.
  • Power-management implementation using UPF/CPF, including verification and power estimation.
  • Timing closure and STA, including constraint development and verification.
  • IR-drop/EM modelling, analysis and verification.
  • Setup, use, and verification of RC extraction flows.
  • Ability to set up, run, and debug DRC/LVS/ERC/DFM using at least one of the main EDA tool sets.

Desirable skills

  • Team leadership or technical management.
  • Experience in foundry tapeout.
  • ASIC package development and package/die co-design.
  • Foundry, Packaging, and IP supplier engagement and management

Personal skills

  • Ability to take full ownership of a task from initial assignment through to successful completion and sign-off
  • Quality-driven approach
  • Excellent communication and interpersonal skills
  • Self-motivated and adaptable
  • Take ownership of problems
  • Strong/Creative problem-solving skills
  • Good team player

We offer a competitive salary, excellent working environment, matched contribution pension scheme, subsidised private healthcare scheme, meal tickets, life assurance and share options scheme.

India Opportunities

Job Reference: ENS 201217 : VERIFICATION ENGINEER (Bangalore, India)

Skill Set: ASIC Verification, System Verilog, UVM

Experience: 4- 12 years

No. of positions: Multiple

Background:

  • 4 to 12 years of experience in Verification with hands on in SV/UVM methodology
  • Code coverage and functional coverage is necessary
  • Experience in SoC /IP level Verification needed
  • Gate sim /Power aware verification is a plus

Desirable skills

  • Team leadership or technical management.
  • Cache coherency verification is plus
  • CPU verification is added advantage
  • Writing /debugging  C and assembly tests

Personal Skills

  • Ability to take full ownership.
  • Strong and effective presentation & problem solving skills.
  • Excellent communication and interpersonal skills
  • Self-motivated and adaptable
  • Good team player

Position : Senior/Principal Physical Design Engineer
Job Ref. : ENS-201027B
Location : Bengaluru, India

As part of our ongoing expansion, EnSilica need to strengthen our ASIC Implementation team. We are looking for bright candidates who have an enthusiasm and aptitude for working in this vital part of our business.

The ideal candidate will have a strong academic record and 5-10 years experience in IC Physical Design (PD) using advanced digital ASIC development flows.

You will have a solid track-record and be familiar with the challenges of implementing complex ASIC/SoC designs from RTL to tapeout-ready GDSII, preferably in process nodes down towards 5nm.

The candidate should have customer and supplier-facing experience and excellent communication skills.

Key responsibilities

  • Take full-flow ownership of all stages of the digital RTL-to-GDSII implementation flow for complex block-level or full-chip ASIC designs.
  • Work closely with our customers and other EnSilica teams to deliver projects on-time and to the required performance and quality levels.
  • Setup, run, and maintain EDA tool flows, as needed, for each stage of the development flow.
  • Follow EnSilica’s ISO Quality Management System requirements for implementation, reviews, and reporting.
  • Keep up to date with all aspects of advanced ASIC implementation methodology and best-practice to ensure that EnSilica’s expertise and services are always current and appropriate for each customer project.

Key Skills / Background

  • 1st or 2.1 Electronics, Physics or relevant subject from a Tier 1 group University.
  • 5-10 years experience in industry with a strong track record in Physical Design gained across several successful ASIC projects, and at process nodes down to ~7nm.
  • Ability to quickly and efficiently solve problems, working both independently and with support from colleagues, our suppliers, and our customers where needed.
  • Extensive hands-on experience with either Synopsys ICC1/2 or Cadence Innovus for block-level and/or full-chip physical design, preferably down to ~7nm FF.
  • RTL synthesis using Design Compiler or Genus, including DFT/scan-insertion.
  • Power-management implementation using UPF/CPF, including verification and power estimation.
  • Timing closure and STA, including constraint development and verification.
  • IR-drop/EM modelling, analysis and verification.
  • Setup, use, and verification of RC extraction flows.
  • Ability to setup, run, and debug DRC/LVS/ERC/DFM using at least one of the main EDA tool sets.

Desirable skills

  • Team leadership or technical management.
  • Experience in foundry tapeout.
  • ASIC package development and package/die co-design.
  • Foundry, Packaging, and IP supplier engagement and management.

Personal Skills

  • Ability to take full ownership of a task from initial assignment through to successful completion and sign-off
  • Quality-driven approach
  • Excellent communication and interpersonal skills
  • Self-motivated and adaptable
  • Take ownership of problems
  • Strong/Creative problem-solving skills
  • Good team player

Job Reference: ENS200605-: POST SILICON VALIDATION ENGINEER (Bangalore, India)

Experience: 8- 10 years

No. of positions: Multiple

Background:

  • Relevant experience in the area of SoC / Microprocessor / Microcontroller / Embedded Systems verification, validation and customer support
  • Exposure to validation of IP modules / SoC subsystems / Interfaces such as Reset / Clock / CAN / SPI / LIN / UART / on-chip debug IPs etc.
  • Experience with building Embedded Software Applications
  • Knowledge about communication protocols is a must.
  • Must have proven debug skills with exposure to different debug tools
  • Hands-on experience in C, assembly, Perl / Python / Shell scripting is a must
  • Working knowledge of UNIX, Windows and embedded operating system
  • Experience in silicon validation using functional and requirement based validation methodologies
  • Familiarity with Pre-Si verification methodology, Post-Si validation concepts, test plans, post-Si validation environment, validation test case writing & debug with the required instruments, tools and environment
  • Working knowledge on emulation / simulation / Perspec would be an added advantage
  • Experience in using lab equipment’s such as Oscilloscopes, Protocol Analysers/Exercisers, Mid-bus Probes, Logic Analysers, JTAG based debuggers such as PLS, Lauterbach etc.

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS200420A : Validation Engineer (Bangalore, India)

Experience: 8- 10 years

Role:

The candidate will be responsible for developing embedded test software, automation and debug tools for Aurix micro controllers. He/She will be responsible for one or more functional areas and contribute to software development for MC D organization for automotive

Responsibilities:

  • Development of Post-Silicon validation collateral & methodologies
  • Writing validation tests and execute by simulating and/or running on Silicon
  • Candidates will need to debug failing tests, then work with designers and architects to resolve issues
  • Successful candidates can anticipate failure modes, and write test content to stress the design and identify bugs
  • Candidate will analyze coverage gaps and develop strategies to fill coverage holes
  • The quality of the design and the final product is directly proportional to the quality of the design validation work.
  • Strong discipline and attention to detail in ensuring effective and high quality validation that minimizes bug escapes to customers or higher levels of validation

Key Skills:

  • Experience in the area of SoC / Microprocessor / Microcontroller / Embedded Systems verification, validation and customer support
  • Exposure to validation of IP modules / SoC subsystems / Interfaces such as Reset / Clock / CAN / SPI / LIN / UART / on-chip debug IPs etc.
  • Experience with building Embedded Software Applications
  • Knowledge about communication protocols is a must.
  • Must have proven debug skills with exposure to different debug tools
  • Hands-on experience in C, assembly, Perl / Python / Shell scripting is a must
  • Working knowledge of UNIX, Windows and embedded operating system
  • Experience in silicon validation using functional and requirement based validation methodologies
  • Familiarity with Pre-Si verification methodology, Post-Si validation concepts, test plans, post-Si validation environment, validation test case writing & debug with the required instruments, tools and environment
  • Working knowledge on emulation / simulation / Perspec would be an added advantage
  • Experience in using lab equipment’s such as Oscilloscopes, Protocol Analysers/Exercisers, Mid-bus Probes, Logic Analysers, JTAG based debuggers such as PLS, Lauterbach etc.
  • Technical abilities demonstrated through Ideas conceived & deployed

Personal Skills:

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS200420B : Verification Engineer (Bangalore, India)

Role:

Good understanding of different methodologies, but particularly System Verilog and UVM. Faced with a new project, you will have the ability to quickly assimilate the verification challenge and help define an effective (and pragmatic) verification strategy.

Responsibilities:

  • Verification specialist working on projects as the verification engineer.
  • Provide high-class verification support to a wide range of projects using a range of advanced verification techniques including constrained random, coverage driven, assertion-based and formal methods.
  • As a verification engineer you would also be responsible for the development of a comprehensive verification strategy and plan, along with the architecting and development of the complete test environment.
  • Active participation in the verification community to drive the introduction of new and effective techniques– to help solve the verification challenges faced in the projects.

Key Skills:

  • Bachelor’s Degree in Electronic Engineering or related discipline.
  • 3 to 5 years of experience in UVM based verification
  • Strong knowledge in UVM and System Verilog in must
  • Strong protocol knowledge and expertise on USB2.0 serial interface
  • Deep understanding of USB2.0 Phy and interoperability/compliance issues
  • Working with Mentor QVIP based Verification environment or any other commercial VIP based verification environment.

Personal skills:

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS190314-FPGADE : FPGA DESIGN ENGINEER (Bangalore, India)

Skill Set: FPGA Design, Synopsys Synplify, Xilinx Vivado, ISE

Experience: 5+ years

No. of positions: Multiple

Background:

  • B.S. or M.S. EE/CS/CE with 5+ years working in the semiconductor industry.
  • 3+ years of FPGA experience including implementation, synthesis, timing closure.
  • Proficiency in Verilog, VHDL and System Verilog.
  • Proficiency in Synopsys Synplify, Xilinx Vivado, ISE
  • Hands on with FPGA debug methodologies, such as ChipScope.
  • Experience building, running and debugging SoC system on emulation platforms (Zebu, Palladium or Veloce)
  • Hands on experience with lab debug equipment such as oscilloscopes and logic analyzers.
  • Strong scripting skills in Perl/Python.
  • Detail oriented individual with good interpersonal skills and excellent written and verbal communications skills
  • Experience in Verification methodologies such OVM, UVM, test bench design and implementation
  • Knowledge of high-speed interfaces including PCIe, HMC/HBM, SATA, Ethernet, DDR3/4.
  • Knowledge of devices including SPI, IIC, SD, NAND/NOR Flash.
  • Knowledge of multi-core coherent processors and processor-based verification.

Role:

  • You will be a valued member of the Platform Engineering team.
  • You will implement and validate FPGA prototypes of AI and ML IP. This position requires a wide range of skills, and extraordinary problem solving ability.
  • The role includes RTL design, verification, FPGA partitioning and implementation, and lab based bring up of the AI and ML IP designs.
  • Responsible for ownership of emulation of a block/subsystem on emulation platforms (Zebu, Palladium or Veloce)
  • You will work with design, software and verification teams to validate and debug the FPGA prototypes of IP designs.

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS190102-ANLYEN : ANALOG LAYOUT ENGINEER (Bangalore, India)

Skill Set: CMOS Analog/Mixed Signal IC Layout

Experience: 3 to 6 years

No. of positions: Multiple

Background:

  • Designing IC Layout of Complex Analog and Mixed Signal Designs like SerDes, PLL, DPLL, Sense Amplifier, Op-Amp, LDO, BIAS. BGR, ADC, Oscillators, Power Management IC’s, GPIO/Special IO’s
  • ESD and IO Layout Experience is Plus.
  • Should be Experienced in DMOS, SiGe BCD and CMOS technology in nodes 250nm, 350nm, 180nm 90nm, 45nm 28nm, 16FF, and 7FF is plus
  • Experienced in Using Industry leading EDA tools like Cadence, Calibre, RedHawk and etc..
  • Should have experience in automation with Skill, Python and Perl Programming.

Role:

  • Candidate will work on Analog mixed-signal IC Layout with responsibilities ranging from small cell layout design to Big Module IC layout Development like comparators, charge pumps, op-amps, power stages, linear regulators, ADC’s and etc.
  • Candidate will take a assignment from the Project-Lead/Designer and should understand the requirements and finish the high quality layout in time
  • Candidate should possess strong DRC/LVS debugging skills.
  • Knowledge of differnet matching techniques, floor planning, power planning, and signal integrity is a must.
  • Candidate should possess strong DRC/LVS debugging skills

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS190102A-PRVEN : PROCESSOR VERIFICATION ENGINEER/LEAD (Bangalore, India)

Skill Set: ARM/MIPS/ Verification, System Verilog, UVM

Experience: 4- 15 years

No. of positions: Multiple

Background:

  • 4 to 15 years of experience in ARM/MIPS/ x86 processor based verification environment.
  • System Verilog based test environment development experience.
  • Work experience in Coverage driven verification using UVM methodology.
  • Experience with Design Verification/validation best practices such as Test Plan development, Testbench development and measurable execution thereof.
  • Familiar with Microprocessor and/or SoC Architecture and micro Architecture, preferably ARM/MIPS/x86 processor based systems
  • Familiar with instruction driven verification of processors based on Assembler or C/C++
  • Familiar with SoC/ASIC integration flow and architectures
  • Familiar with AMBA protocols, AXI, ACE, CHI, APB, AHB
  • Languages: C/C++, Assembler, Perl
  • Experience of ARM/MIPS/x86 based System Designs, Knowledge of CPU and hierarchical memory system

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS180911A-SRFPVE : SENIOR FPGA VALIDATION ENGINEER (Bangalore, India)

Skill Set: FPGA implementation and validation of digital IP’s, Working on FPGA based Test Environment set-up.

Experience: 4+ years

No. of positions: Multiple

Background:

  • 4+ years’ experience in FPGA based IP Module development and verification
  • Experience in IP validation using FPGA based verification/Validation environment
  • Good experience in programming languages such as Verilog, VHDL, C/C++, Perl/Python
  • Experience in the area of validation of IP modules such as Port, DIO, PWM, ICU, OCU etc
  • Familiarity with coverage concepts, test plans, post-Si validation environment, automation, and test writing/debug
  • Experience in using lab equipment’s such as Oscilloscopes, Protocol Analyzers/Exercisers, Mid-bus Probes, Logic Analyzers, JTAG based Debuggers etc.

Role:

  • Own and lead one or more functional area of microcontroller for FPGA based digital IP development and verification
  • Collect requirement on FPGA based test environment and stimulus generation using FPGA based IPs
  • Comprehend multi-core challenges and plan ahead to mitigate risks
  • Ramp on Tri-Core and peripheral devices as well as interface bus on the Tri-Board
  • Technical owner of the assigned work area
  • Ramp and own one or more digital IP’s from the context of FPGA development of the corresponding IP’s
  • Contribute to set-up the FPGA based Automation Environment

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS170908-ASICDE : ASIC DESIGN ENGINEER/ LEAD (Bangalore, India)

Skill Set: ASIC Design, RTL Coding

Experience: 5 -15 years

No. of positions: Multiple

Background:

  • MSEE + minimum 5 years of relevant experience doing digital standard cell based IC design using Verilog, synthesis tools, timing analysis and physical verification tools.
  • Experience with mixed signal systems is a must
  • Design for testability, scan insertion, scan vector generation
  • Familiarity with Cadence and Synopsys design tools
  • Debugging ICs and associated evaluation systems in a lab environment
  • Experience architecting and implementing DSP functions such as filters and modulators is a plus
  • Experience architecting complex devices in deep submicron technologies is a plus
  • Experience with UVM and System Verilog is a plus

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS170908D-PSVLE : POST SILICON VALIDATION ENGINEER (Bangalore, India)

Skill Set: Post silicon validation, electrical/ PVT/bench characterization

Experience: 4- 9 years

No. of positions: Multiple

Background:

  • Must have a Bachelors or Masters degree in Electrical Engineering, Computer Science or Computer Engineering or equivalent
  • Experience in Silicon validation using functional and requirement based validation methodologies
  • Good experience in programming languages such as C/C++, Assembly, Perl / Shell scripting, etc.
  • Experience in the area of validation of IP modules such as CAN, LIN, USB, Ethernet, etc. is a plus
  • Familiarity with coverage concepts, test plans, post-Si validation environment, automation, and test writing/debug
  • Experience in using lab equipments such as Oscilloscopes, Protocol Analyzers/Exercisers, Mid-bus Probes, Logic Analyzers, JTAG based Debuggers etc.
  • Working knowledge of UNIX, Windows and embedded operating system
  • Exposure to test development on system simulators and emulators is an advantage
  • Experience in working with cross-site organisations is a must

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

Job Reference: ENS170908G-SRVEL : SENIOR VERIFICATION ENGINEER/LEAD (Bangalore, India)

Skill Set: ASIC Verification, System Verilog, UVM

Experience: 7- 15 years

No. of positions: Multiple

Background:

  • 7+ years of experience in Verification with hands on in SV/UVM methodology
  • Experience in protocols – USB/Can needed
  • Experience in SoC /IP level Verification needed
  • Gate sim /Power aware verification is a plus

Personal skills :

  • Excellent communication and interpersonal skills
  • Strong and effective presentation skills, able to operate at multiple levels including senior management
  • Self motivated
  • Take ownership of problems
  • Creative problem solving
  • Team player

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