Case Study

Automotive GNSS Baseband Processor

Complete SoC development of a GNSS Baseband processor with power-management and including the design of all the analog IP.

Features	Dual core 32-bit processor with double precision FPU Multi-standard, fast acquisition, high accuracy GNSS accelerator hardware Cryptographic accelerators including SHA521, TRNG, AES AMBA peripherals including CAN-FD, I2C, SPI/QSPI, UART, DMA multiple clock domains Battery-backed logic domain Custom designed PLL, Osc, SMPS, LDO, Battery-backup Logic
Process	28 nm
DFT	Full-Scan, MBIST, Test Compression, Analog Test and Boundary-scan
Tool-chain	Synopsys: DC-Ultra, ICC2, StarRC, Formality, PrimeTime-SI/PX Mentor: Questa, Questa CDC, Tessent and Calibre Cadence: full analog design toolset